diff options
| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2011-02-16 13:43:00 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2011-02-16 13:43:00 +0000 |
| commit | 025ead7792eebd8c088c9e913c2224bca5918435 (patch) | |
| tree | cf7673a122640554a0fd698ac0b24721ae3adf8e /src/southbridge/via/vt8237r/lpc.c | |
| parent | ddb3f0adaa0cc1a0a0dfa8b46eeee5c3d2dbca9e (diff) | |
Extended K8T890 driver to include the K8T800 and K8M800 northbridges
The K8T800 is almost identical to the K8T800Pro, also added to this patch.
The K8T800_OLD is also defined, which is an older version of the K8T800,
but which has no driver and early HT code yet. Also extended the K8M890 VGA
driver to work for the K8M800 (not tested). According to the datasheet, the
K8T890 and K8T800 are similar enough to be able to use the same
initialization code. At least for the K8T800, this is sufficient to have
a working HT link with the CPU, and to initialise the V-Link to the
southbridge.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via/vt8237r/lpc.c')
| -rw-r--r-- | src/southbridge/via/vt8237r/lpc.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index 3ffc377572..61f4989f54 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -299,11 +299,20 @@ static void vt8237r_init(struct device *dev) */ pci_write_config8(dev, 0x48, 0x0c); #else + + #if CONFIG_SOUTHBRIDGE_VIA_K8T800 + /* It seems that when we pair with the K8T800, we need to disable + * the A2 mask + */ + pci_write_config8(dev, 0x48, 0x0c); + #else /* * Set Read Pass Write Control Enable * (force A2 from APIC FSB to low). */ pci_write_config8(dev, 0x48, 0x8c); + #endif + #endif southbridge_init_common(dev); @@ -319,6 +328,8 @@ static void vt8237r_init(struct device *dev) #endif printk(BIOS_SPEW, "Leaving %s.\n", __func__); + printk(BIOS_SPEW, "And taking a dump:\n"); + dump_south(dev); } static void vt8237a_init(struct device *dev) @@ -469,6 +480,7 @@ static void vt8237_common_init(struct device *dev) * Bit | Meaning * ------------- * 3 | Bypass APIC De-Assert Message (1=Enable) + * 2 | APIC HyperTransport Mode (1=Enable) * 1 | possibly "INTE#, INTF#, INTG#, INTH# as PCI" * | bit 1=1 works for Aaron at VIA, bit 1=0 works for jakllsch * 0 | Dynamic Clock Gating Main Switch (1=Enable) @@ -485,12 +497,13 @@ static void vt8237_common_init(struct device *dev) pci_write_config8(dev, 0x4c, 0x44); /* ROM memory cycles go to LPC. */ - pci_write_config8(dev, 0x59, 0x80); + pci_write_config8(dev, 0x59, 0x80); /* * Bit | Meaning * ------------- * 3 | Bypass APIC De-Assert Message (1=Enable) + * 2 | APIC HyperTransport Mode (1=Enable) * 1 | possibly "INTE#, INTF#, INTG#, INTH# as PCI" * | bit 1=1 works for Aaron at VIA, bit 1=0 works for jakllsch * 0 | Dynamic Clock Gating Main Switch (1=Enable) |