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authorElyes HAOUAS <ehaouas@noos.fr>2018-05-19 10:29:50 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-21 20:26:01 +0000
commitbcb124e0098156b0d7f03589cf631aa3738a0dae (patch)
tree2eb0311de04242b7a272067072cb9e738de5bfa1 /src/southbridge/via/vt8237r/lpc.c
parentec41dae245df3fd938de0dfce3459f2a85a92753 (diff)
sb/via/vt8237r: Get rid of device_t
Use of device_t has been abandoned in ramstage. Change-Id: Ic4137bc4008d08e0e0d002e52c353fc29355ccb1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26395 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/via/vt8237r/lpc.c')
-rw-r--r--src/southbridge/via/vt8237r/lpc.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index 70ac5d9cc6..46b1e237fd 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -62,7 +62,7 @@ static unsigned char *pin_to_irq(const unsigned char *pin)
static void pci_routing_fixup(struct device *dev)
{
#if IS_ENABLED(CONFIG_EPIA_VT8237R_INIT)
- device_t pdev;
+ struct device *pdev;
#endif
/* PCI PNP Interrupt Routing INTE/F - disable */
@@ -144,7 +144,7 @@ static void pci_routing_fixup(struct device *dev)
* This avoids having to handle any System Management Interrupts (SMIs).
*/
-static void setup_pm(device_t dev)
+static void setup_pm(struct device *dev)
{
u16 tmp;
struct southbridge_via_vt8237r_config *cfg;
@@ -567,7 +567,7 @@ static void vt8237_common_init(struct device *dev)
cmos_init(0);
}
-static void vt8237r_read_resources(device_t dev)
+static void vt8237r_read_resources(struct device *dev)
{
struct resource *res;
@@ -639,7 +639,8 @@ static void southbridge_init_common(struct device *dev)
}
-static void vt8237_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void vt8237_set_subsystem(struct device *dev, unsigned vendor,
+ unsigned device)
{
pci_write_config16(dev, 0x70, vendor);
pci_write_config16(dev, 0x72, device);