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authorElyes HAOUAS <ehaouas@noos.fr>2014-07-22 23:33:40 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-07-24 12:43:06 +0200
commitb7ea95fa8ecf232bc22f8898cabf3f86eb75cf2c (patch)
tree9657e6d971e3fdfe50b0a017e3213a4eb793fa78 /src/southbridge/via/vt8235
parentf4d1d3b98622912e629c33c637d94c7e3c35098e (diff)
southbridge/via: Remove trailing whitespace
Change-Id: I28deda21a7070ea6f14f973b66fd5dd119bc6225 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6345 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/via/vt8235')
-rw-r--r--src/southbridge/via/vt8235/early_smbus.c35
1 files changed, 17 insertions, 18 deletions
diff --git a/src/southbridge/via/vt8235/early_smbus.c b/src/southbridge/via/vt8235/early_smbus.c
index 96da2fab59..c346b81f6a 100644
--- a/src/southbridge/via/vt8235/early_smbus.c
+++ b/src/southbridge/via/vt8235/early_smbus.c
@@ -1,18 +1,18 @@
-#define SMBUS_IO_BASE 0xf00
-
-#define SMBHSTSTAT 0x0
-#define SMBSLVSTAT 0x1
-#define SMBHSTCTL 0x2
-#define SMBHSTCMD 0x3
-#define SMBXMITADD 0x4
-#define SMBHSTDAT0 0x5
-#define SMBHSTDAT1 0x6
-#define SMBBLKDAT 0x7
-#define SMBSLVCTL 0x8
-#define SMBTRNSADD 0x9
-#define SMBSLVDATA 0xa
-#define SMLINK_PIN_CTL 0xe
-#define SMBUS_PIN_CTL 0xf
+#define SMBUS_IO_BASE 0xf00
+
+#define SMBHSTSTAT 0x0
+#define SMBSLVSTAT 0x1
+#define SMBHSTCTL 0x2
+#define SMBHSTCMD 0x3
+#define SMBXMITADD 0x4
+#define SMBHSTDAT0 0x5
+#define SMBHSTDAT1 0x6
+#define SMBBLKDAT 0x7
+#define SMBSLVCTL 0x8
+#define SMBTRNSADD 0x9
+#define SMBSLVDATA 0xa
+#define SMLINK_PIN_CTL 0xe
+#define SMBUS_PIN_CTL 0xf
/* Define register settings */
#define HOST_RESET 0xff
@@ -21,8 +21,8 @@
#define SMBUS_TIMEOUT (100*1000*10)
-#define I2C_TRANS_CMD 0x40
-#define CLOCK_SLAVE_ADDRESS 0x69
+#define I2C_TRANS_CMD 0x40
+#define CLOCK_SLAVE_ADDRESS 0x69
static void enable_smbus(void)
{
@@ -244,5 +244,4 @@ int smbus_read_byte(unsigned device, unsigned address, unsigned char *result)
return host_status_register != 0x02;
}
-
#endif