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| author | Greg Watson <jarrah@users.sourceforge.net> | 2004-04-22 22:31:49 +0000 |
|---|---|---|
| committer | Greg Watson <jarrah@users.sourceforge.net> | 2004-04-22 22:31:49 +0000 |
| commit | b717e48352fe5466a92431f1597b85f902d75673 (patch) | |
| tree | 8050b71f88482531883e16fea63275f27fa6d45e /src/southbridge/via/vt8235/vt8235.c | |
| parent | d9dfed56e6384e66294f19851b8488412b3bb751 (diff) | |
start of epia-m port
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1524 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via/vt8235/vt8235.c')
| -rw-r--r-- | src/southbridge/via/vt8235/vt8235.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/southbridge/via/vt8235/vt8235.c b/src/southbridge/via/vt8235/vt8235.c index 8d5292fad2..ca5ab32ac3 100644 --- a/src/southbridge/via/vt8235/vt8235.c +++ b/src/southbridge/via/vt8235/vt8235.c @@ -229,7 +229,7 @@ static void vt8235_init(struct southbridge_via_vt8235_config *conf) /* IDE controller */ dev1 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, 0); /* Power management controller */ - devpwr = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235_4, 0); + //devpwr = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235_4, 0); // enable the internal I/O decode enables = pci_read_config8(dev0, 0x6C); @@ -315,22 +315,22 @@ static void vt8235_init(struct southbridge_via_vt8235_config *conf) // Power management setup // // Set ACPI base address to IO 0x4000 - pci_write_config32(devpwr, 0x48, 0x4001); + //pci_write_config32(devpwr, 0x48, 0x4001); // Enable ACPI access (and setup like award) - pci_write_config8(devpwr, 0x41, 0x84); + //pci_write_config8(devpwr, 0x41, 0x84); // Set hardware monitor base address to IO 0x6000 - pci_write_config32(devpwr, 0x70, 0x6001); + //pci_write_config32(devpwr, 0x70, 0x6001); // Enable hardware monitor (and setup like award) - pci_write_config8(devpwr, 0x74, 0x01); + //pci_write_config8(devpwr, 0x74, 0x01); // set IO base address to 0x5000 - pci_write_config32(devpwr, 0x90, 0x5001); + //pci_write_config32(devpwr, 0x90, 0x5001); // Enable SMBus - pci_write_config8(devpwr, 0xd2, 0x01); + //pci_write_config8(devpwr, 0xd2, 0x01); // // IDE setup |