Changes to allow Via/Epia code to be compiled after recent code changes.

New Files :-
	src/cpu/via/model_centaur/Config.lb
	src/cpu/via/model_centaur/model_centaur_init.c

Updated Files :-
	src/arch/i386/include/arch/smp/mpspec.h
		- make write_smp_table a define for non smp systems
	src/cpu/x86/lapic/lapic_cpu_init.c
		- change possible typo
	src/mainboard/via/epia/Config.lb
	src/mainboard/via/epia/Options.lb

	src/mainboard/via/epia/auto.c
	src/mainboard/via/epia/chip.h
	src/mainboard/via/epia/failover.c
		- updated after recent code changes
	src/northbridge/via/vt8601/chip.h
	src/northbridge/via/vt8601/northbridge.c
	src/northbridge/via/vt8601/raminit.c
		- corrections after recent code changes to allow compiling
	src/southbridge/via/vt8231/chip.h
	src/southbridge/via/vt8231/vt8231.c
		- initial pass to allow compiling after recent code changes.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

2 files changed, 15 insertions, 29 deletions

diff --git a/src/southbridge/via/vt8231/chip.h b/src/southbridge/via/vt8231/chip.h
index 28c3b2ef74..bc1e445f26 100644
--- a/src/southbridge/via/vt8231/chip.h
+++ b/src/southbridge/via/vt8231/chip.h
@@ -1,7 +1,7 @@
 #ifndef _SOUTHBRIDGE_VIA_VT8231
 #define _SOUTHBRIDGE_VIA_VT8231
 
-extern struct chip_operations southbridge_via_vt8231_control;
+extern struct chip_operations southbridge_via_vt8231_ops;
 
 struct southbridge_via_vt8231_config {
 	/* PCI function enables */
diff --git a/src/southbridge/via/vt8231/vt8231.c b/src/southbridge/via/vt8231/vt8231.c
index 27d635d38f..082b64e0f3 100644
--- a/src/southbridge/via/vt8231/vt8231.c
+++ b/src/southbridge/via/vt8231/vt8231.c
@@ -161,11 +161,9 @@ static const unsigned char slotIrqs[4] = { 5, 10, 12, 11 };
 	PCI slot is AD31          (device 15) (00:14.0)
 	Southbridge is AD28       (device 12) (00:11.0)
 */
-static void pci_routing_fixup(void)
+static void pci_routing_fixup(struct device *dev)
 {
-	device_t dev;
 
-        dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
 	printk_info("%s: dev is %p\n", __FUNCTION__, dev);
 	if (dev) {
 		/* initialize PCI interupts - these assignments depend
@@ -423,33 +421,21 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
 	rtc_init(0);
 }
 
-static void southbridge_init(struct chip *chip, enum chip_pass pass)
-{
+static void southbridge_init(struct device *dev) {
+	vt8231_init(dev->chip_info);
+	pci_routing_fixup(dev);
+}
 
-	struct southbridge_via_vt8231_config *conf = 
-		(struct southbridge_via_vt8231_config *)chip->chip_info;
+struct device_operations vt8231_dev_ops = {
+	.init = &southbridge_init,
+};
 
-	switch (pass) {
-	case CONF_PASS_PRE_PCI:
-		vt8231_pci_enable(conf);
-		break;
-		
-	case CONF_PASS_POST_PCI:
-		vt8231_init(conf);
-		pci_routing_fixup();
-		break;
-
-	case CONF_PASS_PRE_BOOT:
-		dump_south();
-		break;
-		
-	default:
-		/* nothing yet */
-		break;
-	}
+static void southbridge_enable(struct device *dev)
+{
+	dev->ops = &vt8231_dev_ops;	
 }
 
-struct chip_operations southbridge_via_vt8231_control = {
-	.enable    = southbridge_init,
-	.name      = "VIA vt8231"
+struct chip_operations southbridge_via_vt8231_ops = {
+	.enable_dev	= southbridge_enable,
+	.name		= "VIA vt8231"
 };