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author | Andrey Petrov <andrey.petrov@intel.com> | 2017-06-05 18:09:51 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-07-13 21:04:47 +0000 |
commit | fed4303b45aa3c8ba98cd2ab90cf5bf023fc6aae (patch) | |
tree | e47018a118754d564e7ac00403e744136f7ca968 /src/southbridge/via/k8t890/romstrap.S | |
parent | 6a00113de8b9060a7227bcfa79b3786e3e592a33 (diff) |
soc/intel/cannonlake: Add reset.c
Add reset functionality. This implementation relies on CSE to trigger
global reset.
Change-Id: I7e6ae07a48f1cdc3d2f4cdb74246627d27253adf
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20070
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/via/k8t890/romstrap.S')
0 files changed, 0 insertions, 0 deletions