Following patch adds K8M890 support. It initializes the AGP and graphics UMA.

The V-link setup and HT bridge is redone, because VT8237A has it in another
device. So far following combination of chipsets should now work:

K8T890CE + VT8237R
K8M890(CE) + VT8237R

VIA PC1 brige moved to NB code (vt8237r_bridge.c -> k8t890_bridge.c) and
notes about K8M890 support were added.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3183 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 85 insertions, 3 deletions

diff --git a/src/southbridge/via/k8t890/k8t890_dram.c b/src/southbridge/via/k8t890/k8t890_dram.c
index 38074220ae..00e5fa5f24 100644
--- a/src/southbridge/via/k8t890/k8t890_dram.c
+++ b/src/southbridge/via/k8t890/k8t890_dram.c
@@ -23,6 +23,8 @@
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
+#include <bitops.h>
+#include "k8t890.h"
 
 static void dram_enable(struct device *dev)
 {
@@ -59,19 +61,99 @@ static void dram_enable(struct device *dev)
 	reg = pci_read_config16(dev, 0x88);
 	reg &= 0xf800;
 
+	/* The Address Next to the Last Valid DRAM Address */
 	pci_write_config16(dev, 0x88, (msr.lo >> 24) | reg);
 }
 
-static const struct device_operations dram_ops = {
+static struct resource *resmax;
+
+static void get_memres(void *gp, struct device *dev, struct resource *res)
+{
+	unsigned int *fbsize = (unsigned int *) gp;
+	uint64_t proposed_base = res->base + res->size - *fbsize;
+
+	printk_debug("get_memres: res->base=%llx res->size=%llx %d %d %d\n",
+			res->base, res->size, (res->size > *fbsize), 
+			(!(proposed_base & (*fbsize - 1))),
+			(proposed_base < ((uint64_t) 0xffffffff)));
+
+	/* if we fit and also align OK, and must be below 4GB */
+	if ((res->size > *fbsize) && (!(proposed_base & (*fbsize - 1))) && 
+		(proposed_base < ((uint64_t) 0xffffffff) )) {
+		resmax = res;
+	}
+}
+
+
+static void dram_init_fb(struct device *dev)
+{
+	/* Important bits:
+	 * Enable the internal GFX bit 7 of reg 0xa1 plus in same reg:
+	 * bits 6:4 X fbuffer size will be  2^(X+2) or 100 = 64MB, 101 = 128MB 
+	 * bits 3:0 BASE [31:28]
+	 * reg 0xa0 bits 7:1 BASE [27:21] bit0 enable CPU access
+	 */
+	u8 tmp;
+	uint64_t proposed_base;
+	unsigned int fbsize = (K8M890_FBSIZEMB * 1024 * 1024);
+
+	resmax = NULL;
+	search_global_resources(
+                IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
+                get_memres, (void *) &fbsize);
+
+	/* no space for FB */
+	if (!resmax) {
+		printk_err("VIA FB: no space for framebuffer in RAM\n");
+		return;
+	}
+
+	proposed_base = resmax->base + resmax->size - fbsize;
+	resmax->size -= fbsize;
+
+	printk_debug("VIA FB proposed base: %llx\n", proposed_base);
+
+	/* enable UMA but no FB */
+	pci_write_config8(dev, 0xa1, 0x80);
+
+	/* 27:21 goes to 7:1, 0 is enable CPU access */
+	tmp = (proposed_base >> 20) | 0x1;
+	pci_write_config8(dev, 0xa0, tmp);
+
+	/* 31:28 goes to 3:0 */
+	tmp = ((proposed_base >> 28) & 0xf);
+	tmp = ((log2(K8M890_FBSIZEMB) - 2) << 4);
+	tmp |= 0x80;
+	pci_write_config8(dev, 0xa1, tmp);
+
+	/* TODO K8 needs some UMA fine tuning too maybe call some generic routine here? */
+}
+
+static const struct device_operations dram_ops_t = {
+	.read_resources		= pci_dev_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_dev_enable_resources,
+	.enable			= dram_enable,
+	.ops_pci		= 0,
+};
+
+static const struct device_operations dram_ops_m = {
 	.read_resources		= pci_dev_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.enable			= dram_enable,
+	.init			= dram_init_fb,
 	.ops_pci		= 0,
 };
 
-static const struct pci_driver northbridge_driver __pci_driver = {
-	.ops	= &dram_ops,
+static const struct pci_driver northbridge_driver_t __pci_driver = {
+	.ops	= &dram_ops_t,
 	.vendor	= PCI_VENDOR_ID_VIA,
 	.device	= PCI_DEVICE_ID_VIA_K8T890CE_3,
 };
+
+static const struct pci_driver northbridge_driver_m __pci_driver = {
+	.ops	= &dram_ops_m,
+	.vendor	= PCI_VENDOR_ID_VIA,
+	.device	= PCI_DEVICE_ID_VIA_K8M890CE_3,
+};