diff options
| author | Martin Roth <martinroth@google.com> | 2017-06-24 21:30:42 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-13 23:54:56 +0000 |
| commit | 1858d6a90a81aac67cde90190d8a332b2e817c9d (patch) | |
| tree | e9d62ce12354e419a8c055da12d092642fac4d88 /src/southbridge/via/k8t890/ctrl.c | |
| parent | 32c27c2f850c64cdbf78acd00f0c2ce4b535af64 (diff) | |
src/southbridge: add IS_ENABLED() around Kconfig symbol references
Change-Id: Ie965cbcf7f7b6f6c9e9a69e2a1ff0ba491246cbe
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20353
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/via/k8t890/ctrl.c')
| -rw-r--r-- | src/southbridge/via/k8t890/ctrl.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/via/k8t890/ctrl.c b/src/southbridge/via/k8t890/ctrl.c index 7255a92cea..f5e248dea0 100644 --- a/src/southbridge/via/k8t890/ctrl.c +++ b/src/southbridge/via/k8t890/ctrl.c @@ -47,11 +47,11 @@ void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb) pci_write_config8(dev, 0x70, 0xc2); /* PCI Control */ -#if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD +#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD) pci_write_config8(dev, 0x72, 0xee); #endif pci_write_config8(dev, 0x73, 0x01); -#if CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD +#if IS_ENABLED(CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD) pci_write_config8(dev, 0x74, 0x64); pci_write_config8(dev, 0x75, 0x3f); #else @@ -59,7 +59,7 @@ void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb) pci_write_config8(dev, 0x75, 0x0f); #endif pci_write_config8(dev, 0x76, 0x50); -#if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD +#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD) pci_write_config8(dev, 0x77, 0x08); #endif pci_write_config8(dev, 0x78, 0x01); @@ -156,7 +156,7 @@ static void ctrl_init(struct device *dev) /* PCI CFG Address bits[27:24] are used as extended register address bit[11:8] */ -#if !CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD +#if !IS_ENABLED(CONFIG_SOUTHBRIDGE_VIA_SUBTYPE_K8T800_OLD) pci_write_config8(dev, 0x47, 0x30); #endif |