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authorMartin Roth <martin.roth@se-eng.com>2014-12-07 22:11:54 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-16 00:42:13 +0100
commit51dde6fe3b2fec59fd42f36fd025ac09910a3764 (patch)
tree1bd23caabc9aa084f8eda1689ce013c20a91e919 /src/southbridge/ti
parentcdb61a6f5d2268b059ac56da3b69ad0313f3fb90 (diff)
inteltool: Start adding Bay Trail
- Add silvermont (Bay Trail core) MSRs - these are shared with rangeley/avoton. - Add GPIO values and GPIO muxing information. - Add Bay Trail to the PM list. Still to do: - Northbridge functionality (RCBA, Memory timings, etc.) - Add Graphics registers Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7711 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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