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author | Amanda Huang <amanda_hwang@compal.corp-partner.google.com> | 2021-01-26 12:32:27 +0800 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-01-27 15:39:55 +0000 |
commit | 4891e0b4d1dd88f35a672a74af7f06b32864f8ad (patch) | |
tree | 7e16d040427b4c20bc62c1f01349e5d770367bc7 /src/southbridge/ti | |
parent | cf246d5166170ba78fcbe2a013135fb233fc9c39 (diff) |
soc/intel/alderlake: Generate LP4x SPD files using gen_spd.go
This change uses gen_spd.go and global_lp4x_mem_parts.json.txt to
generate SPD files for currently known LP4x memory parts that can be
used with ADL-based mainboards.
BUG=b:176491791
Change-Id: Ie75e43833bf9ba6557fc59cf8b4a0358d495e56a
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49919
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/ti')
0 files changed, 0 insertions, 0 deletions