diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-09-08 12:06:53 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-09 14:37:42 +0000 |
| commit | e9b71d91c2ea2956efb39a782bcffb5d280009b0 (patch) | |
| tree | 80952a14df54e46fc487366a969555818bc0951f /src/southbridge/ti | |
| parent | 467eb569c05e67c7e723466fa7c8e46a2046c07a (diff) | |
soc/intel/broadwell: Set FADT `duty_offset` to 0
From ACPI specification, version 6.2 Errata A:
A `duty_width` value of 0 indicates that processor duty cycle is not
supported and the processor continuously runs at its base frequency.
Because Broadwell sets `duty_width` to 0, processor duty cycle is not
supported, and the value of `duty_offset` is ignored. For consistency
with Lynx Point, set `duty_offset` to 0.
Change-Id: I68cb85ec32a6cceda0cea29d76df6c6219b78a40
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57493
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/southbridge/ti')
0 files changed, 0 insertions, 0 deletions