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authorTim Wawrzynczak <twawrzynczak@chromium.org>2021-06-17 12:44:06 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-06-30 22:20:06 +0000
commit25d24523886f7f2feb5b017ea24f8900c4c603d4 (patch)
tree0027328d0db83b4fdbd4cff58f361ff74d597231 /src/southbridge/ti
parentc0e82e705d9a4747b1ccf7e6863c91c1e01bada7 (diff)
soc/intel/tigerlake: Send End-of-Post message to CSE
This is done to ensure the CSE will not execute any pre-boot commands after it receives this command. Verified EOP and error recovery sequence from Intel doc#612229 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Iae6b2eac11c065749e57c5337d81ed20044fc903 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55632 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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