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| author | Subrata Banik <subrata.banik@intel.com> | 2020-10-03 22:06:36 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-10-05 04:00:34 +0000 |
| commit | 319a91f89483a8a183b6388ab7a126fe2d69550e (patch) | |
| tree | 43dca1a68e4e2ee19380e785d335b6b416cb59db /src/southbridge/ti/pci7420/pci7420.h | |
| parent | 3b3bbd4fbacf2ae50dfface02e901567a79ea985 (diff) | |
soc/intel/skylake: Align platform.asl with CNL
Refer _WAK and _PTS ASL functions from common platform.asl
TEST=Dump and disassemble DSDT, verify all methods present inside
common platform.asl like _WAK, _PTS etc. are still there.
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I625e42b3c49abbb3595a4307da5fc24850a98fbb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45980
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/ti/pci7420/pci7420.h')
0 files changed, 0 insertions, 0 deletions