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| author | Marc Jones <marc.jones@se-eng.com> | 2013-02-11 14:39:28 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-17 22:49:34 +0100 |
| commit | 058d70f163e1a46e16d8577de4e612af04b9aeca (patch) | |
| tree | 6ceae6d8581504828c9e8bbd6721c811b7bb9842 /src/southbridge/ti/pci1x2x | |
| parent | 783f226208f0d25cc25ff3a9d56e108a09fb4cff (diff) | |
Add bd82x6x XHCI(USB3) S3/S4 workaround
The bd82x6x requires some additional setting on S3/S4 entry.
Change-Id: I24489ab94dd7cd5a4a64044f25153f5b01a45b77
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/2759
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/ti/pci1x2x')
0 files changed, 0 insertions, 0 deletions