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authorZheng Bao <zheng.bao@amd.com>2009-06-03 03:15:05 +0000
committerZheng Bao <Zheng.Bao@amd.com>2009-06-03 03:15:05 +0000
commita922b3195b77a3cc82bafad20dd3dfcfd2a61bc0 (patch)
treefbe58f136039f1c35ab5fea76fcd7970b63a3a3e /src/southbridge/sis
parentf8318fe8f9af3d92eaf24aea3457a011e5fde134 (diff)
Modify it based on the RPR 5.7.7. Switching GGSP Configuration By Register Programming.
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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