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author | Hannah Williams <hannah.williams@intel.com> | 2017-05-13 15:59:15 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-05-22 21:29:55 +0200 |
commit | 240409a5f69f04d406e99cf954fb50a024ec84a1 (patch) | |
tree | 90ba7114e5ea76dd799796d1760e78d77397fdad /src/southbridge/sis | |
parent | 7941c96f8eaeb35179b30283ef7bfab6929f2bb7 (diff) |
include/device: Add pci ids for Intel GLK
Change-Id: Ifbca20a0c38cc1fb8ee4b4e336d59e834fcaf57a
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/19686
Reviewed-by: Brenton Dong <brenton.m.dong@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/sis')
0 files changed, 0 insertions, 0 deletions