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authorBora Guvendik <bora.guvendik@intel.com>2017-09-15 16:52:05 -0700
committerAaron Durbin <adurbin@chromium.org>2017-09-19 23:17:46 +0000
commita0e0b054bd086d09d0577c6c1548acae45bb3176 (patch)
tree8edf506fd4ec36d0f94616d240e479b33c1becac /src/southbridge/sis
parentd082b6ae848a91628b210ed7ff9fcc829cfa74f5 (diff)
soc/intel/common/block: Add pci device id for CNL-Y
Change-Id: I2820a39a34a80d066ca5cb364f67dbde0203803e Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/21561 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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