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authorArthur Heymans <arthur@aheymans.xyz>2018-06-03 12:09:52 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-06-05 07:53:38 +0000
commitc2ccc9782d1151efb7eba3ea92feded2ed555391 (patch)
treecd8e8e700ada9cae8b70d97cc9b607f7aa9fba58 /src/southbridge/ricoh
parentdd4d8951368029634f53e44e1a222417b72036c0 (diff)
cpu/intel/car/non-evict: Improve a few things
This improve the following: - Improve readability for clearing fixed MTRR's - Compute PHYSMASK high during runtime - Cache the whole ROM_SIZE instead of XIP_ROM_SIZE Change-Id: Ifaed96b41fab973fa541de1c4f005d6f0af5254f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/26790 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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