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authorDuncan Laurie <dlaurie@chromium.org>2013-04-26 10:35:19 -0700
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-11-24 16:04:12 +0100
commite1e87e0ed6280f168abd92edcd692aec4ead8fe8 (patch)
tree0545c568254811a9b8204ebd880539a689ae1fe5 /src/southbridge/ricoh
parentf24262d01822bd8634e44b5aab19dafe7e04ae72 (diff)
haswell: Configure PCH power sharing for ULT
This reads PCH power levels via PCODE mailbox and writes the values into the PMSYNC registers as indicated in the BWG. Change-Id: Iddcdef9b7deb6365f874f629599d1f7376c9a190 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/49329 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4143 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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