diff options
| author | chenzanxi <chenzanxi@huaqin.corp-partner.google.com> | 2021-01-25 20:04:30 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-27 10:25:16 +0000 |
| commit | 6dc6ee6e72bb302740ea50782981f17635dbf6e5 (patch) | |
| tree | 24574cf394077ff8f2029ae61224ef2cfbb793e5 /src/southbridge/ricoh | |
| parent | 4abc73183134def757c553aa4eb195fffa824100 (diff) | |
mb/google/dedede/var/sasukette: Generate SPD ID for supported memory parts
Add supported memory parts in the mem_parts_used.txt and generate the
SPD ID for the memory parts. The memory parts being added are:
K4U6E3S4AA-MGCR
BUG=None
TEST=Build the sasukette board.
Change-Id: I57c9d22ae655032120f19add98ef454853428af5
Signed-off-by: chenzanxi <chenzanxi@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Diffstat (limited to 'src/southbridge/ricoh')
0 files changed, 0 insertions, 0 deletions