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| author | Pratik Prajapati <pratikkumar.v.prajapati@intel.com> | 2017-09-10 17:37:24 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-14 21:11:02 +0000 |
| commit | 982688a41ae91218fbb2cfbdb8ff19005ffce0f9 (patch) | |
| tree | 8c5c811ba15be267087ccc7425183b15ba46b8e1 /src/southbridge/ricoh/rl5c476/chip.h | |
| parent | b2d6902086d6b7058d8d7a31959c1a16264e4092 (diff) | |
mainboard/intel/cannonlake_rvp-u: Configure USB ports
Configure USB2, USB3 and Type-C ports for CannonLake-U RVP
Change-Id: Id875063721ccb62ad4b5187c81f6abf44bf93f74
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/21482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/ricoh/rl5c476/chip.h')
0 files changed, 0 insertions, 0 deletions