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authorLubomir Rintel <lkundrak@v3.sk>2017-03-18 19:28:51 +0100
committerMartin Roth <martinroth@google.com>2017-04-14 17:20:06 +0200
commit38d1eb44031eb023f00d52481fc77286d28e5157 (patch)
treeea98d3ab21f5aa81463fd6c3cd0f150dc7c34bde /src/southbridge/ricoh/rl5c476/Kconfig
parent43156f662587b094c5a64dbb98a1499107e57b82 (diff)
northbridge/via/cn700/acpi: Add the host bridge
Includes the DRAM controller device that knows which where the division between addresses routed to the main memory and to the PCI bus is. Change-Id: Id4cfeb8ff32de37723eee68a61c576e657dad30b Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/18896 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/ricoh/rl5c476/Kconfig')
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