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authorStefan Reinauer <stefan.reinauer@coreboot.org>2011-04-18 23:51:12 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-18 23:51:12 +0000
commitb3ae1867d1a4b495a56078f521bebec9981f7494 (patch)
tree5f05b92696c5b38932c0bacfb00f5aff285d83f3 /src/southbridge/nvidia
parent261f842c1c3ce5e4ee151889f692a16856c400f3 (diff)
* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value
to unify calls to *_enable_usbdebug() * rename *_enable_usbdebug() to enable_usbdebug() * move enable_usbdebug() to generic romstage console init code and drop it from the individual romstage.c files. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia')
-rw-r--r--src/southbridge/nvidia/ck804/ck804.h2
-rw-r--r--src/southbridge/nvidia/ck804/enable_usbdebug.c2
-rw-r--r--src/southbridge/nvidia/mcp55/enable_usbdebug.c2
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55.h2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804.h b/src/southbridge/nvidia/ck804/ck804.h
index b89ae6fa49..e7bf021c8e 100644
--- a/src/southbridge/nvidia/ck804/ck804.h
+++ b/src/southbridge/nvidia/ck804/ck804.h
@@ -24,7 +24,7 @@
#include "chip.h"
void ck804_enable(device_t dev);
-void ck804_enable_usbdebug(unsigned int port);
+void enable_usbdebug(unsigned int port);
extern struct pci_operations ck804_pci_ops;
diff --git a/src/southbridge/nvidia/ck804/enable_usbdebug.c b/src/southbridge/nvidia/ck804/enable_usbdebug.c
index 3cccded343..361c672833 100644
--- a/src/southbridge/nvidia/ck804/enable_usbdebug.c
+++ b/src/southbridge/nvidia/ck804/enable_usbdebug.c
@@ -46,7 +46,7 @@ void set_debug_port(unsigned int port)
pci_write_config32(dev, 0x74, dword);
}
-void ck804_enable_usbdebug(unsigned int port)
+void enable_usbdebug(unsigned int port)
{
device_t dev = PCI_DEV(0, CK804_DEVN_BASE + 2, 1); /* USB EHCI */
diff --git a/src/southbridge/nvidia/mcp55/enable_usbdebug.c b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
index 2e78fa1ff6..be122d1c20 100644
--- a/src/southbridge/nvidia/mcp55/enable_usbdebug.c
+++ b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
@@ -40,7 +40,7 @@ void set_debug_port(unsigned int port)
pci_write_config32(dev, 0x74, dword);
}
-void mcp55_enable_usbdebug(unsigned int port)
+void enable_usbdebug(unsigned int port)
{
device_t dev = PCI_DEV(0, MCP55_DEVN_BASE + 2, 1); /* USB EHCI */
diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h
index 490a5f78e4..3173c50f39 100644
--- a/src/southbridge/nvidia/mcp55/mcp55.h
+++ b/src/southbridge/nvidia/mcp55/mcp55.h
@@ -35,7 +35,7 @@ extern struct pci_operations mcp55_pci_ops;
#else
#if !defined(__ROMCC__)
void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
-void mcp55_enable_usbdebug(unsigned int port);
+void enable_usbdebug(unsigned int port);
#endif
#endif