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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-17 10:56:26 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-23 15:52:09 +0000
commita342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch)
tree4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/southbridge/nvidia
parent9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff)
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/nvidia')
-rw-r--r--src/southbridge/nvidia/ck804/early_setup.c2
-rw-r--r--src/southbridge/nvidia/mcp55/early_setup_car.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/nvidia/ck804/early_setup.c b/src/southbridge/nvidia/ck804/early_setup.c
index 30b68ecf14..180f41a5fa 100644
--- a/src/southbridge/nvidia/ck804/early_setup.c
+++ b/src/southbridge/nvidia/ck804/early_setup.c
@@ -255,7 +255,7 @@ static void ck804_early_setup(void)
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 19, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)),
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 3, ~(0xff), ((0 << 4) | (1 << 2) | (0 << 0)),
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 3, ~(0xff), ((0 << 4) | (1 << 2) | (1 << 0)),
- RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE + 1 , 0, 0xe4), ~(1 << 23), (1 << 23),
+ RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE + 1, 0, 0xe4), ~(1 << 23), (1 << 23),
#endif
#if IS_ENABLED(CONFIG_CK804_USE_ACI)
diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c
index 6ddd59e850..5289146e91 100644
--- a/src/southbridge/nvidia/mcp55/early_setup_car.c
+++ b/src/southbridge/nvidia/mcp55/early_setup_car.c
@@ -86,7 +86,7 @@ static void mcp55_early_set_port(unsigned mcp55_num, unsigned *busn,
for (j = 0; j < mcp55_num; j++) {
setup_resource_map_offset(ctrl_devport_conf,
ARRAY_SIZE(ctrl_devport_conf),
- PCI_DEV(busn[j], devn[j], 0) , io_base[j]);
+ PCI_DEV(busn[j], devn[j], 0), io_base[j]);
}
}
@@ -103,7 +103,7 @@ static void mcp55_early_clear_port(unsigned mcp55_num, unsigned *busn,
for (j = 0; j < mcp55_num; j++) {
setup_resource_map_offset(ctrl_devport_conf_clear,
ARRAY_SIZE(ctrl_devport_conf_clear),
- PCI_DEV(busn[j], devn[j], 0) , io_base[j]);
+ PCI_DEV(busn[j], devn[j], 0), io_base[j]);
}
}