diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-31 19:22:16 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:22:46 +0200 |
| commit | ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch) | |
| tree | 9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/nvidia/mcp55 | |
| parent | 2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff) | |
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16291
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/nvidia/mcp55')
| -rw-r--r-- | src/southbridge/nvidia/mcp55/early_setup_car.c | 2 | ||||
| -rw-r--r-- | src/southbridge/nvidia/mcp55/nic.c | 16 | ||||
| -rw-r--r-- | src/southbridge/nvidia/mcp55/sata.c | 2 | ||||
| -rw-r--r-- | src/southbridge/nvidia/mcp55/smbus.h | 2 |
4 files changed, 11 insertions, 11 deletions
diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c index 9af2bbcede..619ba4cc90 100644 --- a/src/southbridge/nvidia/mcp55/early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/early_setup_car.c @@ -381,7 +381,7 @@ static int mcp55_early_setup_x(void) device_t dev; dev = PCI_DEV(busnx, devnx, 0); id = pci_read_config32(dev, PCI_VENDOR_ID); - if(id == 0x036910de) { + if (id == 0x036910de) { busn[mcp55_num] = busnx; devn[mcp55_num] = devnx; diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c index 2df096ac41..2474ef325b 100644 --- a/src/southbridge/nvidia/mcp55/nic.c +++ b/src/southbridge/nvidia/mcp55/nic.c @@ -127,26 +127,26 @@ static void nic_init(struct device *dev) struct device *dev_eeprom; dev_eeprom = dev_find_slot_on_smbus(conf->mac_eeprom_smbus, conf->mac_eeprom_addr); - if(dev_eeprom) { + if (dev_eeprom) { // if that is valid we will use that unsigned char dat[6]; int status; int i; - for(i=0;i<6;i++) { + for (i=0;i<6;i++) { status = smbus_read_byte(dev_eeprom, i); - if(status < 0) break; + if (status < 0) break; dat[i] = status & 0xff; } - if(status >= 0) { + if (status >= 0) { mac_l = 0; - for(i=3;i>=0;i--) { + for (i=3;i>=0;i--) { mac_l <<= 8; mac_l += dat[i]; } - if(mac_l != 0xffffffff) { + if (mac_l != 0xffffffff) { mac_l += nic_index; mac_h = 0; - for(i=5;i>=4;i--) { + for (i=5;i>=4;i--) { mac_h <<= 8; mac_h += dat[i]; } @@ -156,7 +156,7 @@ static void nic_init(struct device *dev) } } // if that is invalid we will read that from romstrap - if(!eeprom_valid) { + if (!eeprom_valid) { u32 *mac_pos; mac_pos = (u32 *)0xffffffd0; // refer to romstrap.inc and romstrap.ld mac_l = read32(mac_pos) + nic_index; // overflow? diff --git a/src/southbridge/nvidia/mcp55/sata.c b/src/southbridge/nvidia/mcp55/sata.c index fa761d2ffd..4c2830e9be 100644 --- a/src/southbridge/nvidia/mcp55/sata.c +++ b/src/southbridge/nvidia/mcp55/sata.c @@ -35,7 +35,7 @@ static void sata_init(struct device *dev) dword = pci_read_config32(dev, 0x50); /* Ensure prefetch is disabled */ dword &= ~((1 << 15) | (1 << 13)); - if(conf) { + if (conf) { if (conf->sata1_enable) { /* Enable secondary SATA interface */ dword |= (1<<0); diff --git a/src/southbridge/nvidia/mcp55/smbus.h b/src/southbridge/nvidia/mcp55/smbus.h index 9db21171be..8f2884a09d 100644 --- a/src/southbridge/nvidia/mcp55/smbus.h +++ b/src/southbridge/nvidia/mcp55/smbus.h @@ -48,7 +48,7 @@ static int smbus_wait_until_done(unsigned smbus_io_base) if ( (val & 0xff) != 0) { return 0; } - } while(--loops); + } while (--loops); return -3; } static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device) |