diff options
| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 17:59:12 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2010-10-05 17:59:12 +0000 |
| commit | abc0c7791e18dbd97949a49016f9ebedb823ed84 (patch) | |
| tree | a8c014275fe0c920ccf47f929ec7fe6a151834ea /src/southbridge/nvidia/mcp55 | |
| parent | 5692c5733633bfb8b23f1111de152eff0233b713 (diff) | |
attached patch moves a couple more config flags out of romstage:
CK804_USE_NIC, CK804_USE_ACI, CK804_NUM.
MCP55_USE_NIC, MCP55_USE_ACI, MCP55_NUM.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Pter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia/mcp55')
| -rw-r--r-- | src/southbridge/nvidia/mcp55/Kconfig | 13 | ||||
| -rw-r--r-- | src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c | 16 |
2 files changed, 16 insertions, 13 deletions
diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig index 6084b1ea44..bbb5ab8ed3 100644 --- a/src/southbridge/nvidia/mcp55/Kconfig +++ b/src/southbridge/nvidia/mcp55/Kconfig @@ -1,7 +1,7 @@ config SOUTHBRIDGE_NVIDIA_MCP55 bool - select IOAPIC select HAVE_USBDEBUG + select IOAPIC config ID_SECTION_OFFSET hex @@ -15,3 +15,14 @@ config EHCI_DEBUG_OFFSET hex default 0x98 if SOUTHBRIDGE_NVIDIA_MCP55 +config MCP55_USE_NIC + bool + default n if SOUTHBRIDGE_NVIDIA_MCP55 + +config MCP55_USE_AZA + bool + default n if SOUTHBRIDGE_NVIDIA_MCP55 + +config MCP55_NUM + int + default 1 if SOUTHBRIDGE_NVIDIA_MCP55 diff --git a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c index 6a453cbfea..835a9298db 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c @@ -89,14 +89,6 @@ static void setup_ss_table(unsigned index, unsigned where, unsigned control, con #define MCP55_PCI_E_X_3 4 #endif -#ifndef MCP55_USE_NIC - #define MCP55_USE_NIC 0 -#endif - -#ifndef MCP55_USE_AZA - #define MCP55_USE_AZA 0 -#endif - #define MCP55_CHIP_REV 3 static void mcp55_early_set_port(unsigned mcp55_num, unsigned *busn, unsigned *devn, unsigned *io_base) @@ -269,7 +261,7 @@ static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, unsigned *devn RES_PCI_IO, PCI_ADDR(0, 6, 0, 0xC4), 0xFFFFFFF8, 0x00000007, RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000, -#if MCP55_USE_AZA == 1 +#if CONFIG_MCP55_USE_AZA RES_PCI_IO, PCI_ADDR(0, 6, 1, 0x40), 0x00000000, 0xCB8410DE, // RES_PCI_IO, PCI_ADDR(0, 1, 1, 0xE4), ~(1<<14), 1<<14, @@ -279,7 +271,7 @@ static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, unsigned *devn MCP55_MB_SETUP #endif -#if MCP55_USE_AZA == 1 +#if CONFIG_MCP55_USE_AZA RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 21, ~(3<<2), (2<<2), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 22, ~(3<<2), (2<<2), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 46, ~(3<<2), (2<<2), @@ -308,7 +300,7 @@ static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, unsigned *devn RES_PORT_IO_32, ANACTRL_IO_BASE + 0x60, 0xFFFFFF00, 0x00000012, -#if MCP55_USE_NIC == 1 +#if CONFIG_MCP55_USE_NIC RES_PCI_IO, PCI_ADDR(0, 1, 1, 0xe4), ~((1<<22)|(1<<20)), (1<<22)|(1<<20), RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+ 4, ~(0xff), ((0<<4)|(1<<2)|(0<<0)), @@ -399,7 +391,7 @@ static int mcp55_early_setup_x(void) devn[mcp55_num] = devnx; io_base[mcp55_num] = ht_c_index * HT_CHAIN_IOBASE_D; // we may have ht chain other than MCP55 mcp55_num++; - if(mcp55_num == MCP55_NUM) goto out; + if(mcp55_num == CONFIG_MCP55_NUM) goto out; break; // only one MCP55 on one chain } } |