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authorElyes HAOUAS <ehaouas@noos.fr>2019-02-15 08:21:33 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-02-21 19:07:31 +0000
commit26071aaadfc5926f7e01623d8fb2967456041dfc (patch)
tree3380dfb3eec43cfe46e4daa8fca0f8e24e9158d4 /src/southbridge/nvidia/mcp55
parent94ad37619f95a07b94a6a9a570bd74727eb830c4 (diff)
ACPI: Correct asl_compiler_revision value
Change-Id: I91b54b43c8bb5cb17ff86a6d9afa95f265ee49df Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/31431 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/nvidia/mcp55')
-rw-r--r--src/southbridge/nvidia/mcp55/fadt.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/nvidia/mcp55/fadt.c b/src/southbridge/nvidia/mcp55/fadt.c
index f1d6e9da1f..5b00861264 100644
--- a/src/southbridge/nvidia/mcp55/fadt.c
+++ b/src/southbridge/nvidia/mcp55/fadt.c
@@ -22,6 +22,7 @@
#include <arch/io.h>
#include <device/device.h>
#include <device/pci_ids.h>
+#include <version.h>
extern unsigned pm_base;
@@ -43,7 +44,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
- header->asl_compiler_revision = 42;
+ header->asl_compiler_revision = asl_revision;
printk(BIOS_INFO, "ACPI: pm_base: %u...\n", pm_base);