diff options
| author | Martin Roth <martin@coreboot.org> | 2019-10-23 21:46:03 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-30 11:16:56 +0000 |
| commit | ff744bf0eee875a03dc98dd6792e3ed0ff4456a0 (patch) | |
| tree | 691260ffe71abac0bb8e2a5607b0d6f1cfb16028 /src/southbridge/nvidia/mcp55/nic.c | |
| parent | 5331a7cff9ebf6f92542eee53e6556a4d5a0dc75 (diff) | |
src/southbridge: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Iee2056a50a1201626fa29194afdbfc1f11094420
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36333
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/nvidia/mcp55/nic.c')
| -rw-r--r-- | src/southbridge/nvidia/mcp55/nic.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c index af4df44293..9e350dda26 100644 --- a/src/southbridge/nvidia/mcp55/nic.c +++ b/src/southbridge/nvidia/mcp55/nic.c @@ -29,10 +29,10 @@ #include "chip.h" #include "mcp55.h" -static int phy_read(u8 *base, unsigned phy_addr, unsigned phy_reg) +static int phy_read(u8 *base, unsigned int phy_addr, unsigned int phy_reg) { u32 dword; - unsigned loop = 0x100; + unsigned int loop = 0x100; write32(base + 0x190, 0x8000); /* Clear MDIO lock bit. */ mdelay(1); @@ -61,7 +61,7 @@ static void phy_detect(u8 *base) { u32 dword; int i, val; - unsigned id; + unsigned int id; dword = read32(base + 0x188); dword &= ~(1 << 20); |