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| author | Arthur Heymans <arthur@aheymans.xyz> | 2016-10-08 21:37:13 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-11 23:32:37 +0200 |
| commit | 626f8c84405fc4a16e72fc3e4dc829ca106ea2cf (patch) | |
| tree | 5cc775f55693a975d4573aacb09bcea60a956de3 /src/southbridge/nvidia/ck804 | |
| parent | 6f8b7df8ab69cd2be7d024dfbd7fbeb3a684c6b3 (diff) | |
i945/raminit.c: correctly write CLKCFG for 945GC
MHCBAR(CLKCFG) was previously incorrectly written by the
sdram_program_memory_frequency function which required falsely
limiting the max dram frequency for 945GC.
TESTED on Intel d945gclf (memclock 667 and fsb 533) and
Gigabyte ga-945gcm-s2l (memclock 667 and fsb 1067)
Change-Id: I520efd69fa09fc9fde87c5301fd81121fde6a700
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16940
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge/nvidia/ck804')
0 files changed, 0 insertions, 0 deletions