aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/nvidia/ck804/usb.c
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2019-11-19 17:28:05 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-20 19:06:04 +0000
commit185691eedb37ae26f7829d762cd476395be57f5d (patch)
treec13705dc09e24a407d5fa2af6f8bf2e6493582f7 /src/southbridge/nvidia/ck804/usb.c
parent87bc7554478bc7a723baef0aedf5ad42e7747499 (diff)
sb/nvidia/ck804: Drop support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which platforms using this code lack. Change-Id: I56cb6d0a04056b10af1e53afb697883329235c87 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36972 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/nvidia/ck804/usb.c')
-rw-r--r--src/southbridge/nvidia/ck804/usb.c57
1 files changed, 0 insertions, 57 deletions
diff --git a/src/southbridge/nvidia/ck804/usb.c b/src/southbridge/nvidia/ck804/usb.c
deleted file mode 100644
index f7c315af91..0000000000
--- a/src/southbridge/nvidia/ck804/usb.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2004 Tyan Computer
- * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include "chip.h"
-
-static void usb1_init(struct device *dev)
-{
- struct southbridge_nvidia_ck804_config const *conf = dev->chip_info;
-
- if (!conf->usb1_hc_reset)
- return;
-
- /*
- * Somehow the warm reset does not really reset the USB
- * controller. Later, during boot, when the Bus Master bit is
- * set, the USB controller trashes the memory, causing weird
- * misbehavior. Was detected on Sun Ultra40, where mptable
- * was damaged.
- */
- u32 bar0 = pci_read_config32(dev, 0x10);
- u32 *regs = (u32 *) (bar0 & ~0xfff);
-
- /* OHCI USB HCCommandStatus Register, HostControllerReset bit */
- regs[2] |= 1;
-}
-
-static struct device_operations usb_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = usb1_init,
- .scan_bus = 0,
- .ops_pci = &ck804_pci_ops,
-};
-
-static const struct pci_driver usb_driver __pci_driver = {
- .ops = &usb_ops,
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_CK804_USB,
-};