diff options
author | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:13:46 +0000 |
---|---|---|
committer | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:13:46 +0000 |
commit | 98d0d30f6b8237f888cd44b33292319e3c167a47 (patch) | |
tree | 0571a9e863b7a7749c2e4fd5bda7ec080831a73c /src/southbridge/nvidia/ck804/ck804_sata.c | |
parent | 577f185d382c8130f20f0ee7e8466ed8bbebbacc (diff) |
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-30
Creator: Yinghai Lu <yhlu@tyan.com>
Nvidia Ck804 support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/nvidia/ck804/ck804_sata.c')
-rw-r--r-- | src/southbridge/nvidia/ck804/ck804_sata.c | 176 |
1 files changed, 176 insertions, 0 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804_sata.c b/src/southbridge/nvidia/ck804/ck804_sata.c new file mode 100644 index 0000000000..97744f6823 --- /dev/null +++ b/src/southbridge/nvidia/ck804/ck804_sata.c @@ -0,0 +1,176 @@ +/* + * Copyright 2004 Tyan Computer + * by yhlu@tyan.com + */ +#include <console/console.h> +#include <device/device.h> +#include <delay.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include "ck804.h" + + +static void sata_com_reset(struct device *dev, unsigned reset) +// reset = 1 : reset +// reset = 0 : clear +{ + uint32_t *base; + uint32_t dword; + int loop; + + base = (uint32_t *) pci_read_config32(dev, 0x24); + + printk_debug("base = %08x\r\n", base); + + if(reset) { + *(base + 4) = 0xffffffff; + *(base + 0x44) = 0xffffffff; + } + + dword = *(base +8); + dword &= ~(0xf); + dword |= reset; + + *(base + 8) = dword; + *(base + 0x48) = dword; + +#if 0 + udelay(1000); + dword &= ~(0xf); + *(base + 8) = dword; + *(base + 0x48) = dword; +#endif + + + + if(reset) return; + + dword = *(base+ 0); + printk_debug("*(base+0)=%08x\r\n",dword); + if(dword == 0x113) { + loop = 200000;// 2 + do { + dword = *(base + 4); + if((dword & 0x10000)!=0) break; + udelay(10); + } while (--loop>0); + printk_debug("loop=%d, *(base+4)=%08x\r\n",loop, dword); + } + + + dword = *(base+ 0x40); + printk_debug("*(base+0x40)=%08x\r\n",dword); + if(dword == 0x113) { + loop = 200000;//2 + do { + dword = *(base + 0x44); + if((dword & 0x10000)!=0) break; + udelay(10); + } while (--loop>0); + printk_debug("loop=%d, *(base+0x44)=%08x\r\n",loop, dword); + } + + +} + +static void sata_init(struct device *dev) +{ + + uint32_t dword; + + struct southbridge_nvidia_ck804_config *conf; + conf = dev->chip_info; + + dword = pci_read_config32(dev, 0x50); + /* Ensure prefetch is disabled */ + dword &= ~((1 << 15) | (1 << 13)); + if (conf->sata1_enable) { + /* Enable secondary SATA interface */ + dword |= (1<<0); + printk_debug("SATA S \t"); + } + if (conf->sata0_enable) { + /* Enable primary SATA interface */ + dword |= (1<<1); + printk_debug("SATA P \n"); + } +// write back + dword |= (1<<12); + dword |= (1<<14); + +#if 1 +// ADMA + dword |= (1<<16); + dword |= (1<<17); +#endif + +#if 1 +//DO NOT relay OK and PAGE_FRNDLY_DTXFR_CNT. + dword &= ~(0x1f<<24); + dword |= (0x15<<24); +#endif + pci_write_config32(dev, 0x50, dword); + +#if 1 +//SLUMBER_DURING_D3. + dword = pci_read_config32(dev, 0x7c); + dword &= ~(1<<4); + pci_write_config32(dev, 0x7c, dword); + + dword = pci_read_config32(dev, 0xd0); + dword &= ~(0xff<<24); + dword |= (0x68<<24); + pci_write_config32(dev, 0xd0, dword); + + dword = pci_read_config32(dev, 0xe0); + dword &= ~(0xff<<24); + dword |= (0x68<<24); + pci_write_config32(dev, 0xe0, dword); +#endif + + dword = pci_read_config32(dev, 0xf8); + dword |= 2; + pci_write_config32(dev, 0xf8, dword); + +#if 0 + dword = pci_read_config32(dev, 0xac); + dword &= ~((1<<13)|(1<<14)); + dword |= (1<<13)|(0<<14); + pci_write_config32(dev, 0xac, dword); + + sata_com_reset(dev, 1); // for discover some s-atapi device +#endif + +} + +static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device) +{ + pci_write_config32(dev, 0x40, + ((device & 0xffff) << 16) | (vendor & 0xffff)); +} +static struct pci_operations lops_pci = { + .set_subsystem = lpci_set_subsystem, +}; + +static struct device_operations sata_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, +// .enable = ck804_enable, + .init = sata_init, + .scan_bus = 0, + .ops_pci = &lops_pci, +}; + +static struct pci_driver sata0_driver __pci_driver = { + .ops = &sata_ops, + .vendor = PCI_VENDOR_ID_NVIDIA, + .device = PCI_DEVICE_ID_NVIDIA_CK804_SATA0, +}; + +static struct pci_driver sata1_driver __pci_driver = { + .ops = &sata_ops, + .vendor = PCI_VENDOR_ID_NVIDIA, + .device = PCI_DEVICE_ID_NVIDIA_CK804_SATA1, +}; |