diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2021-02-12 08:09:58 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-02-16 20:57:37 +0000 |
| commit | 608a75c05acc75eb95f51848f00ab084ecf1aeae (patch) | |
| tree | 6b919f69e4780c83c0ad857d516ef397ad29f719 /src/southbridge/intel | |
| parent | 030d338bb23459dfd2f3f710e92a4031845c0e13 (diff) | |
sb/intel: Add missing <types.h>
Add needed but missing <types.h>.
Change-Id: I19d01e1837b1ee946c66d4cc22a5138b64d72078
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50577
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 1 |
3 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 7f648a9f16..ee416c1753 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -23,6 +23,7 @@ #include <southbridge/intel/common/pmutil.h> #include <southbridge/intel/common/rtc.h> #include <southbridge/intel/common/spi.h> +#include <types.h> #define NMI_OFF 0 diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 757f0acc48..828f3d3e3d 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -4,7 +4,6 @@ /* This file is derived from the flashrom project. */ -#include <stdint.h> #include <string.h> #include <bootstate.h> #include <commonlib/helpers.h> @@ -17,6 +16,7 @@ #include <spi_flash.h> #include <spi-generic.h> #include <timer.h> +#include <types.h> #include "spi.h" diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index a9e2c17e38..a37f1a267b 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -19,6 +19,7 @@ #include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/rtc.h> #include <southbridge/intel/common/spi.h> +#include <types.h> #define NMI_OFF 0 |