src/southbridge: Remove whitespace after sizeof

Change-Id: Ic3b599d49a4c03ad8035c558b975f31cb91d253b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16862
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>

9 files changed, 17 insertions, 17 deletions

diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 9041816ba1..623482e679 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -653,7 +653,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 
 static void southbridge_inject_dsdt(device_t dev)
 {
-	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 	void *opregion;
 
 	/* Calling northbridge code as gnvs contains opregion address.  */
@@ -661,7 +661,7 @@ static void southbridge_inject_dsdt(device_t dev)
 
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
-		memset(gnvs, 0, sizeof (*gnvs));
+		memset(gnvs, 0, sizeof(*gnvs));
 
 		acpi_create_gnvs(gnvs);
 
diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c
index faec69a0db..c2dea6bca3 100644
--- a/src/southbridge/intel/fsp_bd82x6x/lpc.c
+++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c
@@ -588,7 +588,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 
 static void southbridge_inject_dsdt(device_t dev)
 {
-	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 	void *opregion;
 
 	/* Calling northbridge code as gnvs contains opregion address.  */
@@ -597,7 +597,7 @@ static void southbridge_inject_dsdt(device_t dev)
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 
-		memset(gnvs, 0, sizeof (*gnvs));
+		memset(gnvs, 0, sizeof(*gnvs));
 
 		acpi_create_gnvs(gnvs);
 		/* IGD OpRegion Base Address */
diff --git a/src/southbridge/intel/fsp_i89xx/lpc.c b/src/southbridge/intel/fsp_i89xx/lpc.c
index 1514500e75..7ebe6e4a11 100644
--- a/src/southbridge/intel/fsp_i89xx/lpc.c
+++ b/src/southbridge/intel/fsp_i89xx/lpc.c
@@ -500,7 +500,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 
 static void southbridge_inject_dsdt(device_t dev)
 {
-	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 	void *opregion;
 
 	/* Calling northbridge code as gnvs contains opregion address.  */
@@ -509,7 +509,7 @@ static void southbridge_inject_dsdt(device_t dev)
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 
-		memset(gnvs, 0, sizeof (*gnvs));
+		memset(gnvs, 0, sizeof(*gnvs));
 
 		acpi_create_gnvs(gnvs);
 		/* IGD OpRegion Base Address */
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index ab617506ef..d621a41329 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -429,7 +429,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 
 static void southbridge_inject_dsdt(device_t dev)
 {
-	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 
 	if (gnvs) {
 		memset(gnvs, 0, sizeof(*gnvs));
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 280e207e11..a995e9fc45 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -656,7 +656,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 
 static void southbridge_inject_dsdt(device_t dev)
 {
-	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index e095ad8622..8212b0a092 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -538,11 +538,11 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 
 static void southbridge_inject_dsdt(device_t dev)
 {
-	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
-		memset(gnvs, 0, sizeof (*gnvs));
+		memset(gnvs, 0, sizeof(*gnvs));
 		acpi_create_gnvs(gnvs);
 
 		gnvs->ndid = gfx->ndid;
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 23b192575f..0a08a15399 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -310,7 +310,7 @@ static void mobile5_pm_init(struct device *dev)
 			/* 2010: */ 0x00188200, 0x14000016, 0xbc4abcb5, 0x00000000,
 			/* 2020: */ 0xf0c9605b, 0x13683040, 0x04c8f16e, 0x09e90170
 		};
-	for (i = 0; i < sizeof (rcba2010) / sizeof (rcba2010[0]); i++)
+	for (i = 0; i < sizeof(rcba2010) / sizeof(rcba2010[0]); i++)
 	{
 		RCBA32 (0x2010 + 4 * i) = rcba2010[i];
 		RCBA32 (0x2010 + 4 * i);
@@ -348,7 +348,7 @@ static void mobile5_pm_init(struct device *dev)
 			/* 2270 */ 0x00001c01, 0x16000000, 0x00010107, 0x00160000
 		};
 
-	for (i = 0; i < sizeof (rcba2210) / sizeof (rcba2210[0]); i++)
+	for (i = 0; i < sizeof(rcba2210) / sizeof(rcba2210[0]); i++)
 	{
 		RCBA32 (0x2210 + 4 * i) = rcba2210[i];
 		RCBA32 (0x2210 + 4 * i);
@@ -361,7 +361,7 @@ static void mobile5_pm_init(struct device *dev)
 			/* 2320: */ 0xcccc0cfc, 0x0fbb0fff
 		};
 
-	for (i = 0; i < sizeof (rcba2300) / sizeof (rcba2300[0]); i++)
+	for (i = 0; i < sizeof(rcba2300) / sizeof(rcba2300[0]); i++)
 	{
 		RCBA32 (0x2300 + 4 * i) = rcba2300[i];
 		RCBA32 (0x2300 + 4 * i);
@@ -619,7 +619,7 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
 
 static void southbridge_inject_dsdt(device_t dev)
 {
-	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 	void *opregion;
 
 	/* Calling northbridge code as gnvs contains opregion address.  */
@@ -627,7 +627,7 @@ static void southbridge_inject_dsdt(device_t dev)
 
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
-		memset(gnvs, 0, sizeof (*gnvs));
+		memset(gnvs, 0, sizeof(*gnvs));
 
 		acpi_create_gnvs(gnvs);
 
diff --git a/src/southbridge/intel/lynxpoint/acpi.c b/src/southbridge/intel/lynxpoint/acpi.c
index f91702ff5d..2a02744a69 100644
--- a/src/southbridge/intel/lynxpoint/acpi.c
+++ b/src/southbridge/intel/lynxpoint/acpi.c
@@ -56,7 +56,7 @@ void acpi_create_intel_hpet(acpi_hpet_t * hpet)
 static void acpi_create_serialio_ssdt_entry(int id, global_nvs_t *gnvs)
 {
 	char sio_name[5] = {};
-	snprintf(sio_name, sizeof (sio_name), "S%1uEN", id);
+	snprintf(sio_name, sizeof(sio_name), "S%1uEN", id);
 	acpigen_write_name_byte(sio_name, gnvs->s0b[id] ? 1 : 0);
 }
 
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index f8ec94ec1f..a399eb357a 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -748,7 +748,7 @@ static void southbridge_inject_dsdt(device_t dev)
 
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
 	if (!gnvs) {
-		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+		gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 		if (gnvs)
 			memset(gnvs, 0, sizeof(*gnvs));
 	}