diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-11 11:15:10 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-06-19 19:33:06 +0000 |
| commit | f957201cf08a9f53cede3567669fccb7ad330ab3 (patch) | |
| tree | 52aeeef73e9867c88a791e23b14d769c289b2140 /src/southbridge/intel | |
| parent | 1264d64a742e6f911b77dd8c63eeebdba94389a6 (diff) | |
sb/intel/common/spi: Properly check if setting FRP succeeded
Change-Id: Ib0b63c3b0342c62aeabb5c6e418eb9811fc6597d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33389
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index d9a77c3bb5..e8c8f01407 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -1038,8 +1038,7 @@ static int spi_flash_protect(const struct spi_flash *flash, /* Set the FPR register and verify it is protected */ write32(&fpr_base[fpr], reg); - reg = read32(&fpr_base[fpr]); - if (!(reg & protect_mask)) { + if (reg != read32(&fpr_base[fpr])) { printk(BIOS_ERR, "ERROR: Unable to set SPI FPR %d\n", fpr); return -1; } |