sb/intel/lynxpoint: Automatically generate the ACPI PCI routing table

This patch is based on a8a9f34e9b7b ("sb/intel/i82801{g,j}x:
Automatically generate ACPI PIRQ tables")

Tested on an ASRock H81M-HDS. The generated _PRT object looks correct,
and the system doesn't show any issue when running. The following
assignments occur:

	ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:03.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:14.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:16.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:1a.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=6
	ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:1c.1: pin=1 pirq=1
	ACPI_PIRQ_GEN: PCI: 00:1c.2: pin=2 pirq=2
	ACPI_PIRQ_GEN: PCI: 00:1c.3: pin=3 pirq=3
	ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=7
	ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=1 pirq=3
	ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=2 pirq=2

Also tested on a Google Peppy board. The following assignments occur:

	ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:03.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:14.0: pin=0 pirq=2
	ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=6
	ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=0
	ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=3
	ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=0 pirq=6
	ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=1 pirq=2
	ACPI_PIRQ_GEN: PCI: 00:1f.6: pin=2 pirq=1

A diff of the _PRT object for the Google Peppy board is below. The code
used in the diff has been modified for clarity, but the semantics remain
the same. To summarise the diff:

* The disabled PCIe root ports are no longer included.

* The LPC controller is no longer included, as it has no interrupt pin.
  The pins for the remaining LPC devices are each one less. Perhaps the
  original _PRT object was incorrect?

* The SDIO device is no longer included, as it is disabled.

* The Serial IO devices are no longer included, but that is due to a
  separate issue I am having with this system (the devices don't show up
  under Linux regardless of this patch). In short: their omission is not
  a fault of this patch.

--- pre/_PRT
+++ post/_PRT
@@ -1,301 +1,157 @@
         Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
         {
             If (PICM)
             {
-                Return (Package (0x12)
+                Return (Package (0x09)
                 {
                     Package (0x04)
                     {
                         0x0002FFFF,
                         Zero,
                         Zero,
                         0x10
                     },

                     Package (0x04)
                     {
                         0x0003FFFF,
                         Zero,
                         Zero,
                         0x10
                     },

                     Package (0x04)
                     {
                         0x0014FFFF,
                         Zero,
                         Zero,
                         0x12
                     },

                     Package (0x04)
                     {
                         0x001BFFFF,
                         Zero,
                         Zero,
                         0x16
                     },

                     Package (0x04)
                     {
                         0x001CFFFF,
                         Zero,
                         Zero,
                         0x10
                     },

-                    Package (0x04)
-                    {
-                        0x001CFFFF,
-                        One,
-                        Zero,
-                        0x11
-                    },
-
-                    Package (0x04)
-                    {
-                        0x001CFFFF,
-                        0x02,
-                        Zero,
-                        0x12
-                    },
-
-                    Package (0x04)
-                    {
-                        0x001CFFFF,
-                        0x03,
-                        Zero,
-                        0x13
-                    },
-
                     Package (0x04)
                     {
                         0x001DFFFF,
                         Zero,
                         Zero,
                         0x13
                     },

                     Package (0x04)
                     {
                         0x001FFFFF,
                         Zero,
                         Zero,
                         0x16
                     },

                     Package (0x04)
                     {
                         0x001FFFFF,
                         One,
                         Zero,
                         0x12
                     },

                     Package (0x04)
                     {
                         0x001FFFFF,
                         0x02,
                         Zero,
                         0x11
-                    },
-
-                    Package (0x04)
-                    {
-                        0x001FFFFF,
-                        0x03,
-                        Zero,
-                        0x10
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0015FFFF,
-                        Zero,
-                        Zero,
-                        0x14
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0015FFFF,
-                        One,
-                        Zero,
-                        0x15
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0015FFFF,
-                        0x02,
-                        Zero,
-                        0x15
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0015FFFF,
-                        0x03,
-                        Zero,
-                        0x15
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0017FFFF,
-                        Zero,
-                        Zero,
-                        0x17
                     }
                 })
             }
             Else
             {
-                Return (Package (0x12)
+                Return (Package (0x09)
                 {
                     Package (0x04)
                     {
                         0x0002FFFF,
                         Zero,
                         ^LPCB.LNKA,
                         Zero
                     },

                     Package (0x04)
                     {
                         0x0003FFFF,
                         Zero,
                         ^LPCB.LNKA,
                         Zero
                     },

                     Package (0x04)
                     {
                         0x0014FFFF,
                         Zero,
                         ^LPCB.LNKC,
                         Zero
                     },

                     Package (0x04)
                     {
                         0x001BFFFF,
                         Zero,
                         ^LPCB.LNKG,
                         Zero
                     },

                     Package (0x04)
                     {
                         0x001CFFFF,
                         Zero,
                         ^LPCB.LNKA,
                         Zero
                     },

-                    Package (0x04)
-                    {
-                        0x001CFFFF,
-                        One,
-                        ^LPCB.LNKB,
-                        Zero
-                    },
-
-                    Package (0x04)
-                    {
-                        0x001CFFFF,
-                        0x02,
-                        ^LPCB.LNKC,
-                        Zero
-                    },
-
-                    Package (0x04)
-                    {
-                        0x001CFFFF,
-                        0x03,
-                        ^LPCB.LNKD,
-                        Zero
-                    },
-
                     Package (0x04)
                     {
                         0x001DFFFF,
                         Zero,
                         ^LPCB.LNKD,
                         Zero
                     },

                     Package (0x04)
                     {
                         0x001FFFFF,
                         Zero,
                         ^LPCB.LNKG,
                         Zero
                     },

                     Package (0x04)
                     {
                         0x001FFFFF,
                         One,
                         ^LPCB.LNKC,
                         Zero
                     },

                     Package (0x04)
                     {
                         0x001FFFFF,
                         0x02,
                         ^LPCB.LNKB,
                         Zero
-                    },
-
-                    Package (0x04)
-                    {
-                        0x001FFFFF,
-                        0x03,
-                        ^LPCB.LNKA,
-                        Zero
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0015FFFF,
-                        Zero,
-                        ^LPCB.LNKE,
-                        Zero
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0015FFFF,
-                        One,
-                        ^LPCB.LNKF,
-                        Zero
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0015FFFF,
-                        0x02,
-                        ^LPCB.LNKF,
-                        Zero
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0015FFFF,
-                        0x03,
-                        ^LPCB.LNKF,
-                        Zero
-                    },
-
-                    Package (0x04)
-                    {
-                        0x0017FFFF,
-                        Zero,
-                        ^LPCB.LNKH,
-                        Zero
                     }
                 })
             }
         }

Change-Id: Id3f067cbf7c7d649fbbf774648d8ff928cb752a4
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/29381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

2 files changed, 14 insertions, 0 deletions

diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index 32485c5c89..1e088c1362 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -33,6 +33,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select HAVE_SPI_CONSOLE_SUPPORT
 	select RTC
 	select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP
+	select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
 	select HAVE_INTEL_CHIPSET_LOCKDOWN
 
 config INTEL_LYNXPOINT_LP
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 6483e6dac9..cf5959ecee 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -36,6 +36,7 @@
 #include <arch/acpigen.h>
 #include <cbmem.h>
 #include <drivers/intel/gma/i915.h>
+#include <southbridge/intel/common/acpi_pirq_gen.h>
 
 #define NMI_OFF	0
 
@@ -789,6 +790,16 @@ static void southbridge_inject_dsdt(struct device *dev)
 	}
 }
 
+static const char *lpc_acpi_name(const struct device *dev)
+{
+	return "LPCB";
+}
+
+static void southbridge_fill_ssdt(struct device *dev)
+{
+	intel_acpi_gen_def_acpi_pirq(dev);
+}
+
 static unsigned long southbridge_write_acpi_tables(struct device *device,
 						   unsigned long start,
 						   struct acpi_rsdp *rsdp)
@@ -835,7 +846,9 @@ static struct device_operations device_ops = {
 	.read_resources		= pch_lpc_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
+	.acpi_fill_ssdt_generator   = southbridge_fill_ssdt,
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
+	.acpi_name		= lpc_acpi_name,
 	.write_acpi_tables      = southbridge_write_acpi_tables,
 	.init			= lpc_init,
 	.enable			= pch_lpc_enable,