diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2012-12-17 11:22:57 -0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-14 18:24:20 +0100 |
| commit | df7be71374a8b80708c58fd13e26b9e3fc6ed54c (patch) | |
| tree | 7d106d7fe952c9164fe818331a4823b74d2e2b89 /src/southbridge/intel | |
| parent | fb9928f2ec240babb5d3138136c03a7a78c53cc4 (diff) | |
haswell: Add ULT device IDs
Device IDs for northbridge and GPU.
Also mask off the lock bit in the memory map registers.
Change-Id: I9a4955d4541b938285712e82dd0b1696fa272b63
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2646
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions