summaryrefslogtreecommitdiff
path: root/src/southbridge/intel
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2015-07-30 16:50:21 -0500
committerAaron Durbin <adurbin@chromium.org>2015-09-29 13:55:52 +0000
commit7dcb545ee2770f3a27d57c2d69cfa140af2d0348 (patch)
treea75436d6b3d4b36b8081b01a3bfd9d5a14cbf3c1 /src/southbridge/intel
parent321402bfced59bd241711ed8ee4a6d8e46f9f081 (diff)
intel: auto include intel/common/firmware
Instead of selecting the Kconfig option and adding the subdir entry within each chipset auto include the common/firmware directory as it's guarded by HAVE_INTEL_FIRMWARE. BUG=chrome-os-partner:43462 BRANCH=None TEST=Built glados. Change-Id: I166db67c41b16c4d9f0116abce00940514539fa5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11734 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc2
-rw-r--r--src/southbridge/intel/common/Makefile.inc3
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/Makefile.inc2
-rw-r--r--src/southbridge/intel/fsp_rangeley/Makefile.inc2
-rw-r--r--src/southbridge/intel/ibexpeak/Makefile.inc2
-rw-r--r--src/southbridge/intel/lynxpoint/Makefile.inc2
6 files changed, 3 insertions, 10 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index 9214450702..a1256df2e3 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_C216)$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X),y)
-subdirs-y += ../common/firmware
-
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 86823a10e4..36dc4327ec 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -17,6 +17,9 @@
## Foundation, Inc.
##
+# CONFIG_HAVE_INTEL_FIRMWARE protects doing anything to the build.
+subdirs-y += firmware
+
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
index 228b6eb5f2..d14d303c75 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc
@@ -20,8 +20,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X),y)
-subdirs-y += ../common/firmware
-
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c
diff --git a/src/southbridge/intel/fsp_rangeley/Makefile.inc b/src/southbridge/intel/fsp_rangeley/Makefile.inc
index 1d35b54dc1..2a66b90ec8 100644
--- a/src/southbridge/intel/fsp_rangeley/Makefile.inc
+++ b/src/southbridge/intel/fsp_rangeley/Makefile.inc
@@ -20,8 +20,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_RANGELEY),y)
-subdirs-y += ../common/firmware
-
ramstage-y += soc.c
ramstage-y += lpc.c
ramstage-y += sata.c
diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc
index 57c498d2f9..77f2797d42 100644
--- a/src/southbridge/intel/ibexpeak/Makefile.inc
+++ b/src/southbridge/intel/ibexpeak/Makefile.inc
@@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK),y)
-subdirs-y += ../common/firmware
-
ramstage-y += ../bd82x6x/pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
index a42fe3946f..7cff6b8fb0 100644
--- a/src/southbridge/intel/lynxpoint/Makefile.inc
+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
@@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT),y)
-subdirs-y += ../common/firmware
-
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c