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authorJoseph Smith <joe@settoplinux.org>2010-04-09 11:10:25 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-09 11:10:25 +0000
commit7488e049df9899dd7062b2ffe393b3e9a6f50dc5 (patch)
treea226c1f16a9220abb947ba46d26570e065494aa5 /src/southbridge/intel
parent853263b963b4cacb4f7fa3a7f2c68dcbd094f1d7 (diff)
1. This patch adds CAR for Intel P6 series processors.
2. Add support for Micro-FCBGA 479 Celeron and PIII's 3. Add support for model_6bx and microcode updates 4. Add support for CAR and Tinybootblock on RCA RM4100 and Thomson IP1000 Build and boot tested. Signed-off-by: Joseph Smith <joe@settoplinux.org> The change to CAR reveiled a few more warnings in the ICH4 and i830 code, I fixed them on the fly. Checking this in because my last two commits broke Joseph's CAR patch. This version fixes the issues. Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx_early_smbus.c1
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx_tco_timer.c5
2 files changed, 1 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c b/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
index b36f03e83d..d9e2af6b15 100644
--- a/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
@@ -115,7 +115,6 @@ static int smbus_wait_until_done(void)
static int smbus_read_byte(unsigned device, unsigned address)
{
- unsigned char global_control_register;
unsigned char global_status_register;
unsigned char byte;
diff --git a/src/southbridge/intel/i82801dx/i82801dx_tco_timer.c b/src/southbridge/intel/i82801dx/i82801dx_tco_timer.c
index 1d4d7640a1..a778d0851d 100644
--- a/src/southbridge/intel/i82801dx/i82801dx_tco_timer.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_tco_timer.c
@@ -21,11 +21,8 @@
static void i82801dx_halt_tco_timer(void)
{
- device_t dev;
- uint16_t halt_tco_timer;
-
/* Set the LPC device statically. */
- dev = PCI_DEV(0x0, 0x1f, 0x0);
+ device_t dev = PCI_DEV(0x0, 0x1f, 0x0);
/* Temporarily set ACPI base address (I/O space). */
pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1));