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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-12-23 07:22:56 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-12-30 12:28:37 +0000
commit3ba79b319ef5d47b0d16482a254de7c5c740e415 (patch)
treee322d7093612ab909c98dd8605b02ea72413ffe4 /src/southbridge/intel
parenta75ab2c46d2f7f14511cfa47a716eb394bdb5415 (diff)
arch/x86: Prevent romcc bootblock from using MMX registers
Platforms with SSE=y or SSE2=y will invoke romcc with -mcpu=k7. This implicitly enabled romcc to consume MMX registers, if XMM set was consumed first. Explicitly tell romcc not to clobber MMX set. Change-Id: I37f1d6ea01873036712dfbb32bb1dcd5d769e85d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30392 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel')
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