diff options
author | Myles Watson <mylesgw@gmail.com> | 2010-03-22 16:33:25 +0000 |
---|---|---|
committer | Myles Watson <mylesgw@gmail.com> | 2010-03-22 16:33:25 +0000 |
commit | 08e0fb881093c977488de6e8d701dd69369123ec (patch) | |
tree | 5a7d8aa8415a0b2143ed6f4d52af87191a33561c /src/southbridge/intel | |
parent | 53b0ea4bf24c0ae51aa9f8447d4ce9d44d46af72 (diff) |
Fix all the format string warnings.
Some other random warnings.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r-- | src/southbridge/intel/i3100/i3100_lpc.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i3100/i3100_reset.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ax/i82801ax_lpc.c | 8 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ex/i82801ex_reset.c | 3 | ||||
-rw-r--r-- | src/southbridge/intel/i82870/p64h2_ioapic.c | 2 |
5 files changed, 9 insertions, 7 deletions
diff --git a/src/southbridge/intel/i3100/i3100_lpc.c b/src/southbridge/intel/i3100/i3100_lpc.c index 4612c916d2..d629e2f144 100644 --- a/src/southbridge/intel/i3100/i3100_lpc.c +++ b/src/southbridge/intel/i3100/i3100_lpc.c @@ -317,7 +317,7 @@ static void lpc_init(struct device *dev) if (!res) { return; } - *((u8 *)(res->base + 0x31ff)) |= (1 << 0); + *((u8 *)((u32)res->base + 0x31ff)) |= (1 << 0); // TODO this code sets int 0 of the IOAPIC in Virtual Wire Mode // (register 0x10/0x11) while the old code used int 1 (register 0x12) diff --git a/src/southbridge/intel/i3100/i3100_reset.c b/src/southbridge/intel/i3100/i3100_reset.c index 3ac52decb6..3f35f5fb83 100644 --- a/src/southbridge/intel/i3100/i3100_reset.c +++ b/src/southbridge/intel/i3100/i3100_reset.c @@ -19,6 +19,7 @@ */ #include <arch/io.h> +#include <reset.h> void hard_reset(void) { diff --git a/src/southbridge/intel/i82801ax/i82801ax_lpc.c b/src/southbridge/intel/i82801ax/i82801ax_lpc.c index 3f0323bd0e..8fccdf0983 100644 --- a/src/southbridge/intel/i82801ax/i82801ax_lpc.c +++ b/src/southbridge/intel/i82801ax/i82801ax_lpc.c @@ -74,7 +74,7 @@ typedef struct southbridge_intel_i82801ax_config config_t; * specific IRQ values in your mainboards Config.lb. */ -void i82801ax_enable_apic(struct device *dev) +static void i82801ax_enable_apic(struct device *dev) { uint32_t reg32; volatile uint32_t *ioapic_index = (volatile uint32_t *)0xfec00000; @@ -108,7 +108,7 @@ void i82801ax_enable_apic(struct device *dev) *ioapic_data = 1; /* Use Processor System Bus to deliver interrupts. */ } -void i82801ax_enable_serial_irqs(struct device *dev) +static void i82801ax_enable_serial_irqs(struct device *dev) { /* Set packet length and toggle silent mode bit. */ pci_write_config8(dev, SERIRQ_CNTL, @@ -220,7 +220,7 @@ static void gpio_init(device_t dev, uint16_t ich_model) } } -void i82801ax_rtc_init(struct device *dev) +static void i82801ax_rtc_init(struct device *dev) { uint8_t reg8; uint32_t reg32; @@ -240,7 +240,7 @@ void i82801ax_rtc_init(struct device *dev) pci_write_config8(dev, RTC_CONF, 0x04); } -void i82801ax_lpc_route_dma(struct device *dev, uint8_t mask) +static void i82801ax_lpc_route_dma(struct device *dev, uint8_t mask) { uint16_t reg16; int i; diff --git a/src/southbridge/intel/i82801ex/i82801ex_reset.c b/src/southbridge/intel/i82801ex/i82801ex_reset.c index a1d92a7cc1..9936892efe 100644 --- a/src/southbridge/intel/i82801ex/i82801ex_reset.c +++ b/src/southbridge/intel/i82801ex/i82801ex_reset.c @@ -1,6 +1,7 @@ #include <arch/io.h> +#include <reset.h> -void i82801ex_hard_reset(void) +void hard_reset(void) { /* Try rebooting through port 0xcf9 */ outb((0 <<3)|(1<<2)|(1<<1), 0xcf9); diff --git a/src/southbridge/intel/i82870/p64h2_ioapic.c b/src/southbridge/intel/i82870/p64h2_ioapic.c index d90fede890..b2523ff436 100644 --- a/src/southbridge/intel/i82870/p64h2_ioapic.c +++ b/src/southbridge/intel/i82870/p64h2_ioapic.c @@ -62,7 +62,7 @@ static void p64h2_ioapic_init(device_t dev) pIndexRegister = (volatile uint32_t*) memoryBase; pWindowRegister = (volatile uint32_t*)(memoryBase + 0x10); - printk(BIOS_DEBUG, "IOAPIC %d at %02x:%02x.%01x MBAR = %x DataAddr = %x\n", + printk(BIOS_DEBUG, "IOAPIC %d at %02x:%02x.%01x MBAR = %p DataAddr = %p\n", apic_id, dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn), pIndexRegister, pWindowRegister); |