summaryrefslogtreecommitdiff
path: root/src/southbridge/intel
diff options
context:
space:
mode:
authorVladimir Serbinenko <phcoder@gmail.com>2014-10-24 19:30:06 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-11-15 20:00:17 +0100
commit741165740f471057d2d66faf1aaf858289b2448e (patch)
tree827b79309ecd035d9815f526170456207ded2727 /src/southbridge/intel
parent2ae46c374c437bb523f844d6db916da9754a4f22 (diff)
fsp: Change mobo partnumbers to reflect that it's running code FSP variant
Change-Id: I7c823550bf77b03907fa8940a8800658d66d6786 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7183 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions