diff options
| author | Xiang Wang <wxjstz@126.com> | 2019-05-29 15:39:48 +0800 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2019-08-12 08:35:17 +0000 |
| commit | f4e158337683640220e3662fd6ca135bd3bad31b (patch) | |
| tree | ecf48ac9a68ffe399fd64b40986cc53754470651 /src/southbridge/intel | |
| parent | 8adaffcbed6372970f34b85177bd42bb508d03e2 (diff) | |
soc/sifive/fu540: add code for spi and map flash to memory spaces
SiFive's ZSBL has initialized flash, but only 16MB of space is available.
1. add code for spi
2. add code to map flash to memory spaces
Change-Id: I106688c65ac7dd70be7479dc4691797b700682d9
Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33055
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions