diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-05-17 17:26:01 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-05-19 21:23:39 +0200 |
| commit | e2fc5e25f2d1cab86edac352d1a91f55c15c9f0a (patch) | |
| tree | 71a86a3dd19e445a04d9088eedd1f14373da75bb /src/southbridge/intel | |
| parent | a1491574ef2c91ff8b89df70feba67ad34836c75 (diff) | |
drivers/spi/spi_flash: Move flash ops to spi_flash_ops structure
Define a new spi_flash_ops structure, move all spi flash operations to
this structure and add a pointer to this structure in struct spi_flash.
BUG=b:38330715
Change-Id: I550cc4556fc4b63ebc174a7e2fde42251fe56052
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19757
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 79b1db7de7..be9b128713 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -885,6 +885,12 @@ static int ich_hwseq_write(const struct spi_flash *flash, u32 addr, size_t len, return 0; } +static const struct spi_flash_ops spi_flash_ops = { + .read = ich_hwseq_read, + .write = ich_hwseq_write, + .erase = ich_hwseq_erase, +}; + static int spi_flash_programmer_probe(const struct spi_slave *spi, struct spi_flash *flash) { @@ -897,9 +903,6 @@ static int spi_flash_programmer_probe(const struct spi_slave *spi, memcpy(&flash->spi, spi, sizeof(*spi)); flash->name = "Opaque HW-sequencing"; - flash->internal_write = ich_hwseq_write; - flash->internal_erase = ich_hwseq_erase; - flash->internal_read = ich_hwseq_read; ich_hwseq_set_addr (0); switch ((cntlr.hsfs >> 3) & 3) { @@ -922,6 +925,8 @@ static int spi_flash_programmer_probe(const struct spi_slave *spi, flash->size = 1 << (19 + (flcomp & 7)); + flash->ops = &spi_flash_ops; + if ((cntlr.hsfs & HSFS_FDV) && ((cntlr.flmap0 >> 8) & 3)) flash->size += 1 << (19 + ((flcomp >> 3) & 7)); printk (BIOS_DEBUG, "flash size 0x%x bytes\n", flash->size); |