diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2012-08-27 11:10:43 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-07 18:39:42 +0100 |
| commit | a2f1b953401d071b45eb51bc21ab174759fcc13f (patch) | |
| tree | 0580e5de01cefefddb4837f381b6595aef5df16e /src/southbridge/intel | |
| parent | 5c103aa8ae56c0758a3e8af11dc70fb62f833f7e (diff) | |
SPI: opmenu special case for WREN as atomic prefix
The code that attempts to use the opmenu needs to have a special
case for write enable now that it is handled as an atomic prefix
and not as a standalone opcode.
To test, ensure that runtime SPI write via ELOG is successful by
checking the event log for a kernel shutdown reason code:
5 | 2012-08-27 11:09:48 | Kernel Event | Clean Shutdown
6 | 2012-08-27 11:09:50 | System boot | 26
7 | 2012-08-27 11:09:50 | System Reset
Change-Id: I527638ef3e2a5ab100192c5be6e6b3b40916295a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1710
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/spi.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c index 5903fd8cf4..2e88932c0b 100644 --- a/src/southbridge/intel/bd82x6x/spi.c +++ b/src/southbridge/intel/bd82x6x/spi.c @@ -505,6 +505,10 @@ static int spi_setup_opcode(spi_transaction *trans) uint8_t optype; uint16_t opcode_index; + /* Write Enable is handled as atomic prefix */ + if (trans->opcode == SPI_OPCODE_WREN) + return 0; + read_reg(cntlr.opmenu, opmenu, sizeof(opmenu)); for (opcode_index = 0; opcode_index < cntlr.menubytes; opcode_index++) { @@ -623,7 +627,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout, if ((with_address = spi_setup_offset(&trans)) < 0) return -1; - if (!ichspi_lock && trans.opcode == 0x06) { + if (!ichspi_lock && trans.opcode == SPI_OPCODE_WREN) { /* * Treat Write Enable as Atomic Pre-Op if possible * in order to prevent the Management Engine from |