diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2019-10-04 09:22:27 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-10-05 13:48:15 +0000 |
| commit | 8d7a89b271959d0817a9682f9b2e9b1436103b95 (patch) | |
| tree | 2a0dbe0cf2a605b08ff2813f927d683df7f81c15 /src/southbridge/intel | |
| parent | f9891c8b469232cca28f0b12f613274f127748df (diff) | |
soc/intel/common/block/p2sb/p2sb: Add missing PCI IDs
The code is compiled on SKL/KBL, but the P2SB PCI IDs were missing.
Add them to make sure that the BAR0 doesn't change when running PCI
resource allocation.
Change-Id: I7cffbbc7d15dad14cccd122a081099b51dc1ce07
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions