Drop Intel E7520 and E7525 and related boards

There is no Cache As Ram for these boards, let's get rid of them.
Also drop unused dependencies

Change-Id: I94782da521c32ade7891ada29d3013cbab32a48b
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7836
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

6 files changed, 0 insertions, 222 deletions

diff --git a/src/southbridge/intel/Kconfig b/src/southbridge/intel/Kconfig
index 45e3a4ee5e..426ac0bb9d 100644
--- a/src/southbridge/intel/Kconfig
+++ b/src/southbridge/intel/Kconfig
@@ -10,7 +10,6 @@ source src/southbridge/intel/i82801ex/Kconfig
 source src/southbridge/intel/i82801gx/Kconfig
 source src/southbridge/intel/i82801ix/Kconfig
 source src/southbridge/intel/i82870/Kconfig
-source src/southbridge/intel/pxhd/Kconfig
 source src/southbridge/intel/sch/Kconfig
 source src/southbridge/intel/bd82x6x/Kconfig
 source src/southbridge/intel/ibexpeak/Kconfig
diff --git a/src/southbridge/intel/Makefile.inc b/src/southbridge/intel/Makefile.inc
index ef1ee9e9b9..dd20d46b06 100644
--- a/src/southbridge/intel/Makefile.inc
+++ b/src/southbridge/intel/Makefile.inc
@@ -10,7 +10,6 @@ subdirs-$(CONFIG_SOUTHBRIDGE_INTEL_I82801EX) += i82801ex
 subdirs-$(CONFIG_SOUTHBRIDGE_INTEL_I82801GX) += i82801gx
 subdirs-$(CONFIG_SOUTHBRIDGE_INTEL_I82801IX) += i82801ix
 subdirs-$(CONFIG_SOUTHBRIDGE_INTEL_I82870) += i82870
-subdirs-$(CONFIG_SOUTHBRIDGE_INTEL_PXHD) += pxhd
 subdirs-$(CONFIG_SOUTHBRIDGE_INTEL_SCH) += sch
 subdirs-$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X) += bd82x6x
 subdirs-$(CONFIG_SOUTHBRIDGE_INTEL_C216) += bd82x6x
diff --git a/src/southbridge/intel/pxhd/Kconfig b/src/southbridge/intel/pxhd/Kconfig
deleted file mode 100644
index f3a6c053fb..0000000000
--- a/src/southbridge/intel/pxhd/Kconfig
+++ /dev/null
@@ -1,2 +0,0 @@
-config SOUTHBRIDGE_INTEL_PXHD
-	bool
diff --git a/src/southbridge/intel/pxhd/Makefile.inc b/src/southbridge/intel/pxhd/Makefile.inc
deleted file mode 100644
index ce96c9717b..0000000000
--- a/src/southbridge/intel/pxhd/Makefile.inc
+++ /dev/null
@@ -1 +0,0 @@
-ramstage-y += bridge.c
diff --git a/src/southbridge/intel/pxhd/bridge.c b/src/southbridge/intel/pxhd/bridge.c
deleted file mode 100644
index 1134f8f2f8..0000000000
--- a/src/southbridge/intel/pxhd/bridge.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * (C) 2003-2004 Linux Networx
- */
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include <device/pcix.h>
-#include <pc80/mc146818rtc.h>
-#include <arch/ioapic.h>
-#include <delay.h>
-#include "pxhd.h"
-
-static void pxhd_enable(device_t dev)
-{
-	device_t bridge;
-	uint16_t value;
-	if ((dev->path.pci.devfn & 1) == 0) {
-		/* Can we enable/disable the bridges? */
-	  	return;
-	}
-	bridge = dev_find_slot(dev->bus->secondary, dev->path.pci.devfn & ~1);
-	if (!bridge) {
-		printk(BIOS_ERR, "Cannot find bridge for ioapic: %s\n",
-			   dev_path(dev));
-		return;
-	}
-	value = pci_read_config16(bridge, 0x40);
-	value &= ~(1 << 13);
-	if (!dev->enabled) {
-		value |= (1 << 13);
-	}
-	pci_write_config16(bridge, 0x40, value);
-}
-
-
-#define NMI_OFF 0
-
-static unsigned int pxhd_scan_bridge(device_t dev, unsigned int max)
-{
-	int bus_100Mhz = 0;
-
-	dev->link_list->dev = dev;
-
-	get_option(&bus_100Mhz, "pxhd_bus_speed_100");
-	if(bus_100Mhz) {
-		uint16_t word;
-
-		printk(BIOS_DEBUG, "setting pxhd bus to 100 Mhz\n");
-		/* set to pcix 100 mhz */
-		word = pci_read_config16(dev, 0x40);
-		word &= ~(3 << 14);
-		word |= (1 << 14);
-		word &= ~(3 << 9);
-		word |= (2 << 9);
-		pci_write_config16(dev, 0x40, word);
-
-		/* reset the bus to make the new frequencies effective */
-		pci_bus_reset(dev->link_list);
-	}
-	return pcix_scan_bridge(dev, max);
-}
-static void pcix_init(device_t dev)
-{
-	/* Bridge control ISA enable */
-	pci_write_config8(dev, 0x3e, 0x07);
-
-	// FIXME Please review lots of dead code here.
-#if 0
-	int nmi_option;
-	uint32_t dword;
-	uint16_t word;
-	uint8_t byte;
-
-	/* Enable memory write and invalidate ??? */
-	byte = pci_read_config8(dev, 0x04);
-        byte |= 0x10;
-        pci_write_config8(dev, 0x04, byte);
-
-	/* Set drive strength */
-	word = pci_read_config16(dev, 0xe0);
-        word = 0x0404;
-        pci_write_config16(dev, 0xe0, word);
-	word = pci_read_config16(dev, 0xe4);
-        word = 0x0404;
-        pci_write_config16(dev, 0xe4, word);
-
-	/* Set impedance */
-	word = pci_read_config16(dev, 0xe8);
-        word = 0x0404;
-        pci_write_config16(dev, 0xe8, word);
-
-	/* Set discard unrequested prefetch data */
-	word = pci_read_config16(dev, 0x4c);
-        word |= 1;
-        pci_write_config16(dev, 0x4c, word);
-
-	/* Set split transaction limits */
-	word = pci_read_config16(dev, 0xa8);
-        pci_write_config16(dev, 0xaa, word);
-	word = pci_read_config16(dev, 0xac);
-        pci_write_config16(dev, 0xae, word);
-
-	/* Set up error reporting, enable all */
-	/* system error enable */
-	dword = pci_read_config32(dev, 0x04);
-        dword |= (1<<8);
-        pci_write_config32(dev, 0x04, dword);
-
-	/* system and error parity enable */
-	dword = pci_read_config32(dev, 0x3c);
-        dword |= (3<<16);
-        pci_write_config32(dev, 0x3c, dword);
-
-	/* NMI enable */
-	nmi_option = NMI_OFF;
-	get_option(&nmi_option, "nmi");
-	if(nmi_option) {
-		dword = pci_read_config32(dev, 0x44);
-        	dword |= (1<<0);
-        	pci_write_config32(dev, 0x44, dword);
-	}
-
-	/* Set up CRC flood enable */
-	dword = pci_read_config32(dev, 0xc0);
-	if(dword) {  /* do device A only */
-		dword = pci_read_config32(dev, 0xc4);
-		dword |= (1<<1);
-		pci_write_config32(dev, 0xc4, dword);
-		dword = pci_read_config32(dev, 0xc8);
-		dword |= (1<<1);
-		pci_write_config32(dev, 0xc8, dword);
-	}
-
-	return;
-#endif
-}
-
-static struct device_operations pcix_ops  = {
-        .read_resources   = pci_bus_read_resources,
-        .set_resources    = pci_dev_set_resources,
-	.enable_resources = pci_bus_enable_resources,
-        .init             = pcix_init,
-        .scan_bus         = pxhd_scan_bridge,
-	.reset_bus        = pci_bus_reset,
-	.ops_pci          = 0,
-};
-
-static const struct pci_driver pcix_driver __pci_driver = {
-        .ops    = &pcix_ops,
-        .vendor = PCI_VENDOR_ID_INTEL,
-        .device = 0x0329,
-};
-
-static const struct pci_driver pcix_driver2 __pci_driver = {
-        .ops    = &pcix_ops,
-        .vendor = PCI_VENDOR_ID_INTEL,
-        .device = 0x032a,
-};
-
-static void ioapic_init(device_t dev)
-{
-	uint32_t value, ioapic_base;
-	/* Enable bus mastering so IOAPICs work */
-	value = pci_read_config16(dev, PCI_COMMAND);
-	value |= PCI_COMMAND_MASTER;
-	pci_write_config16(dev, PCI_COMMAND, value);
-
-	ioapic_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
-
-	setup_ioapic(ioapic_base, 0); // Don't rename IOAPIC ID
-}
-
-static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
-{
-	pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
-		((device & 0xffff) << 16) | (vendor & 0xffff));
-}
-
-static struct pci_operations intel_ops_pci = {
-	.set_subsystem = intel_set_subsystem,
-};
-
-static struct device_operations ioapic_ops = {
-	.read_resources   = pci_dev_read_resources,
-	.set_resources    = pci_dev_set_resources,
-	.enable_resources = pci_dev_enable_resources,
-	.init             = ioapic_init,
-	.scan_bus         = 0,
-	.enable           = pxhd_enable,
-	.ops_pci          = &intel_ops_pci,
-};
-
-static const struct pci_driver ioapic_driver __pci_driver = {
-	.ops    = &ioapic_ops,
-	.vendor = PCI_VENDOR_ID_INTEL,
-	.device = 0x0326,
-
-};
-
-static const struct pci_driver ioapic2_driver __pci_driver = {
-	.ops    = &ioapic_ops,
-	.vendor = PCI_VENDOR_ID_INTEL,
-	.device = 0x0327,
-
-};
-
-struct chip_operations southbridge_intel_pxhd_ops = {
-	CHIP_NAME("Intel PXHD Southbridge")
-	.enable_dev = pxhd_enable,
-};
diff --git a/src/southbridge/intel/pxhd/pxhd.h b/src/southbridge/intel/pxhd/pxhd.h
deleted file mode 100644
index b0e8cdbfce..0000000000
--- a/src/southbridge/intel/pxhd/pxhd.h
+++ /dev/null
@@ -1,5 +0,0 @@
-#ifndef PXHD_H
-#define PXHD_H
-
-
-#endif /* PXHD_H */