diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-10-25 19:44:16 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-04 23:22:04 +0000 |
| commit | 527647677a8da418bf4854eada32d9090393ee5f (patch) | |
| tree | 3f8d0eebf44fc629f23aa3855d68363078997c36 /src/southbridge/intel | |
| parent | df7a887cb56b8e8f4a6734b2a2cca96517587bfa (diff) | |
sb/intel/lynxpoint/acpi/gpio.asl: Simplify constants
Only LPT-LP includes this file, so `ISLP` is effectively constant. Thus,
eliminate some unnecessary if-blocks, since only one branch gets taken.
Change-Id: Ie8ba787bf5c021845e1e47256a6303697aa97fe1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46776
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/acpi/gpio.asl | 22 |
1 files changed, 8 insertions, 14 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/gpio.asl b/src/southbridge/intel/lynxpoint/acpi/gpio.asl index 1eefcdd197..7f30307cab 100644 --- a/src/southbridge/intel/lynxpoint/acpi/gpio.asl +++ b/src/southbridge/intel/lynxpoint/acpi/gpio.asl @@ -29,27 +29,21 @@ Device (GPIO) Method (_CRS, 0, NotSerialized) { - If (\ISLP ()) { - CreateDwordField (^RBUF, ^BAR0._MIN, BMIN) - CreateDwordField (^RBUF, ^BAR0._MAX, BMAX) - CreateDwordField (^RBUF, ^BAR0._LEN, BLEN) - - Store (DEFAULT_GPIOSIZE, BLEN) - Store (DEFAULT_GPIOBASE, BMIN) - Store (Subtract (Add (DEFAULT_GPIOBASE, + CreateDwordField (^RBUF, ^BAR0._MIN, BMIN) + CreateDwordField (^RBUF, ^BAR0._MAX, BMAX) + CreateDwordField (^RBUF, ^BAR0._LEN, BLEN) + + Store (DEFAULT_GPIOSIZE, BLEN) + Store (DEFAULT_GPIOBASE, BMIN) + Store (Subtract (Add (DEFAULT_GPIOBASE, DEFAULT_GPIOSIZE), 1), BMAX) - } Return (RBUF) } Method (_STA, 0, NotSerialized) { - If (\ISLP ()) { - Return (0xF) - } Else { - Return (0x0) - } + Return (0xF) } // GWAK: Setup GPIO as ACPI GPE for Wake |