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author | Nico Huber <nico.huber@secunet.com> | 2013-05-14 11:43:03 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-05-22 18:00:56 +0200 |
commit | 26a64351234093fbeea6e776be8829eae012ce7f (patch) | |
tree | 477cee1c0e3c6f43b0e3f1fc2de796869fbc2457 /src/southbridge/intel | |
parent | 0da92863a754828eb807f1a15927f0dc288a1788 (diff) |
intel/gm45: Refactor DDR3 read training
Split some code in individual functions. It's the refactoring part of
a bigger change, following...
Change-Id: Ied551a011eaf22f6f8f6db0044de3634134f0b37
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3253
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions