summaryrefslogtreecommitdiff
path: root/src/southbridge/intel
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2019-02-28 13:04:29 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-03-01 10:02:29 +0000
commit0d4de2a4771f2b88062dc4d14e9ddd4f00650741 (patch)
tree1e02005f0457270a1b8b156df5a90f8ef6536c9d /src/southbridge/intel
parentc3d03b3197dd5c582c18bcf7b9ececde130d07b3 (diff)
ACPI: Rename FADT model and set it to zero
INT_MODEL defined in ACPI 1.0 and renamed to reserved since V 2.0. The value for this field is zero but 1 is allowed to maintain compatibility with ACPI 1.0. So set this value to zero as we are using greater version than ACPI 1.0. Change-Id: I910ead4e5618c958a7989f4c309a3a4bb938e31a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29986 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: David Guckian Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c2
-rw-r--r--src/southbridge/intel/fsp_rangeley/acpi.c2
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c2
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c2
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c2
5 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 4de4f1664c..de6b78c9cb 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -745,7 +745,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe;
int c2_latency;
- fadt->model = 1;
+ fadt->reserved = 0;
fadt->sci_int = 0x9;
fadt->smi_cmd = APM_CNT;
diff --git a/src/southbridge/intel/fsp_rangeley/acpi.c b/src/southbridge/intel/fsp_rangeley/acpi.c
index 0aebb20cd4..f88e99987f 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi.c
+++ b/src/southbridge/intel/fsp_rangeley/acpi.c
@@ -59,7 +59,7 @@ void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->firmware_ctrl = (unsigned long) facs;
fadt->dsdt = (unsigned long) dsdt;
- fadt->model = 0; /* reserved, should be 0 ACPI 3.0 */
+ fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */
fadt->preferred_pm_profile = config->fadt_pm_profile; /* unknown is default */
/* System Management */
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 7497c7968c..b71693a7c2 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -572,7 +572,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->mon_alrm = 0x00;
fadt->century = 0x32;
- fadt->model = 1;
+ fadt->reserved = 0;
fadt->sci_int = 0x9;
fadt->smi_cmd = APM_CNT;
fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index b06959aa5b..6027d152ef 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -585,7 +585,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->mon_alrm = 0x00;
fadt->century = 0x32;
- fadt->model = 1;
+ fadt->reserved = 0;
fadt->sci_int = 0x9;
fadt->smi_cmd = APM_CNT;
fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index a96b7ff089..edbb57e799 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -655,7 +655,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe;
int c2_latency;
- fadt->model = 1;
+ fadt->reserved = 0;
fadt->sci_int = 0x9;
fadt->smi_cmd = APM_CNT;