diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-10-12 00:17:11 +0200 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-10-17 12:48:12 +0200 |
commit | 06c788db1ac6fd1faa1de67d4c0ddd03f3dbdbbe (patch) | |
tree | cbfb2565c7312db7d0c3cfa35074931f7ad3d34c /src/southbridge/intel | |
parent | 1aff2e97ea242ce6c841d2dba945cfb2cec0ec80 (diff) |
bd82x6x: Consolidate common GNVS init
Change-Id: Iea035f80695623e4e8d53eea7e3ec294d868fb5b
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7053
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 62188749c0..75b8a6c91e 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -685,6 +685,15 @@ static void southbridge_inject_dsdt(void) memset(gnvs, 0, sizeof (*gnvs)); acpi_create_gnvs(gnvs); + + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ + gnvs->pcnt = dev_count_cpu(); + +#if CONFIG_CHROMEOS + chromeos_init_vboot(&(gnvs->chromeos)); +#endif + /* IGD OpRegion Base Address */ gnvs->aslb = (u32)opregion; /* And tell SMI about it */ |